Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml- Extension
.yaml- Size
- 2488 bytes
- Lines
- 90
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI HD3SS3220 TypeC DRP Port Controller
maintainers:
- Biju Das <biju.das.jz@bp.renesas.com>
description: |-
HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel
Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The
HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a
Dual Role Port (DRP) making it ideal for any application.
properties:
compatible:
const: ti,hd3ss3220
reg:
maxItems: 1
interrupts:
maxItems: 1
id-gpios:
description:
An input gpio for USB ID pin. Upon detecting a UFP device, HD3SS3220
will keep ID pin high if VBUS is not at VSafe0V. Once VBUS is at VSafe0V,
the HD3SS3220 will assert ID pin low. This is done to enforce Type-C
requirement that VBUS must be at VSafe0V before re-enabling VBUS.
maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: OF graph bindings (specified in bindings/graph.txt) that model
SS data bus to the SS capable connector.
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Super Speed (SS) MUX inputs connected to SS capable connector.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: Output of 2:1 MUX connected to Super Speed (SS) data bus.
required:
- port@0
- port@1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
hd3ss3220@47 {
compatible = "ti,hd3ss3220";
reg = <0x47>;
interrupt-parent = <&gpio6>;
interrupts = <3>;
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.