Documentation/devicetree/bindings/watchdog/aspeed,ast2400-wdt.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/watchdog/aspeed,ast2400-wdt.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/watchdog/aspeed,ast2400-wdt.yaml- Extension
.yaml- Size
- 4638 bytes
- Lines
- 147
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/watchdog/aspeed-wdt.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed watchdog timer controllers
maintainers:
- Andrew Jeffery <andrew@codeconstruct.com.au>
properties:
compatible:
enum:
- aspeed,ast2400-wdt
- aspeed,ast2500-wdt
- aspeed,ast2600-wdt
- aspeed,ast2700-wdt
reg:
maxItems: 1
clocks:
maxItems: 1
description: >
The clock used to drive the watchdog counter. From the AST2500 no source
other than the 1MHz clock can be selected, so the clocks property is
optional.
aspeed,reset-type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- cpu
- soc
- system
- none
default: system
description: >
The watchdog can be programmed to generate one of three different types of
reset when a timeout occcurs.
Specifying 'cpu' will only reset the processor on a timeout event.
Specifying 'soc' will reset a configurable subset of the SoC's controllers
on a timeout event. Controllers critical to the SoC's operation may remain
untouched. The set of SoC controllers to reset may be specified via the
aspeed,reset-mask property if the node has the aspeed,ast2500-wdt or
aspeed,ast2600-wdt compatible.
Specifying 'system' will reset all controllers on a timeout event, as if
EXTRST had been asserted.
Specifying 'none' will cause the timeout event to have no reset effect.
Another watchdog engine on the chip must be used for chip reset operations.
aspeed,alt-boot:
$ref: /schemas/types.yaml#/definitions/flag
description: >
Direct the watchdog to configure the SoC to boot from the alternative boot
region if a timeout occurs.
aspeed,external-signal:
$ref: /schemas/types.yaml#/definitions/flag
description: >
Assert the timeout event on an external signal pin associated with the
watchdog controller instance. The pin must be muxed appropriately.
aspeed,ext-pulse-duration:
$ref: /schemas/types.yaml#/definitions/uint32
description: >
Annotation
- Immediate include surface: `dt-bindings/watchdog/aspeed-wdt.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.