Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml
Extension
.yaml
Size
1476 bytes
Lines
68
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller

maintainers:
  - Shawn Guo <shawnguo@kernel.org>
  - Sascha Hauer <s.hauer@pengutronix.de>
  - Fabio Estevam <festevam@gmail.com>

allOf:
  - $ref: watchdog.yaml#

properties:
  compatible:
    oneOf:
      - const: fsl,imx7ulp-wdt
      - items:
          - const: fsl,imx8ulp-wdt
          - const: fsl,imx7ulp-wdt
      - const: fsl,imx93-wdt
      - items:
          - enum:
              - fsl,imx94-wdt
          - const: fsl,imx93-wdt

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  fsl,ext-reset-output:
    description:
      When set, wdog can generate external reset from the wdog_any pin.
    type: boolean

required:
  - compatible
  - interrupts
  - reg
  - clocks

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/imx7ulp-clock.h>

    watchdog@403d0000 {
        compatible = "fsl,imx7ulp-wdt";
        reg = <0x403d0000 0x10000>;
        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
        timeout-sec = <40>;
    };

...

Annotation

Implementation Notes