Documentation/hwmon/asc7621.rst
Source file repositories/reference/linux-study-clean/Documentation/hwmon/asc7621.rst
File Facts
- System
- Linux kernel
- Corpus path
Documentation/hwmon/asc7621.rst- Extension
.rst- Size
- 10283 bytes
- Lines
- 327
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
=====================
Kernel driver asc7621
=====================
Supported chips:
Andigilog aSC7621 and aSC7621a
Prefix: 'asc7621'
Addresses scanned: I2C 0x2c, 0x2d, 0x2e
Datasheet: http://www.fairview5.com/linux/asc7621/asc7621.pdf
Author:
George Joseph
Description provided by Dave Pivin @ Andigilog:
Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
added PECI and a 4th thermal zone. The Andigilog aSC7611 is the
Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
volume production, shipping to Intel and their subs.
We have enhanced both parts relative to the governing Intel
specification. First enhancement is temperature reading resolution. We
have used registers below 20h for vendor-specific functions in addition
to those in the Intel-specified vendor range.
Our conversion process produces a result that is reported as two bytes.
The fan speed control uses this finer value to produce a "step-less" fan
PWM output. These two bytes are "read-locked" to guarantee that once a
high or low byte is read, the other byte is locked-in until after the
next read of any register. So to get an atomic reading, read high or low
byte, then the very next read should be the opposite byte. Our data
sheet says 10-bits of resolution, although you may find the lower bits
are active, they are not necessarily reliable or useful externally. We
chose not to mask them.
We employ significant filtering that is user tunable as described in the
data sheet. Our temperature reports and fan PWM outputs are very smooth
when compared to the competition, in addition to the higher resolution
temperature reports. The smoother PWM output does not require user
intervention.
We offer GPIO features on the former VID pins. These are open-drain
outputs or inputs and may be used as general purpose I/O or as alarm
outputs that are based on temperature limits. These are in 19h and 1Ah.
We offer flexible mapping of temperature readings to thermal zones. Any
temperature may be mapped to any zone, which has a default assignment
that follows Intel's specs.
Since there is a fan to zone assignment that allows for the "hotter" of
a set of zones to control the PWM of an individual fan, but there is no
indication to the user, we have added an indicator that shows which zone
is currently controlling the PWM for a given fan. This is in register
00h.
Both remote diode temperature readings may be given an offset value such
that the reported reading as well as the temperature used to determine
PWM may be offset for system calibration purposes.
PECI Extended configuration allows for having more than two domains per
PECI address and also provides an enabling function for each PECI
address. One could use our flexible zone assignment to have a zone
assigned to up to 4 PECI addresses. This is not possible in the default
Intel configuration. This would be useful in multi-CPU systems with
individual fans on each that would benefit from individual fan control.
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.