Documentation/hwmon/ltc4282.rst
Source file repositories/reference/linux-study-clean/Documentation/hwmon/ltc4282.rst
File Facts
- System
- Linux kernel
- Corpus path
Documentation/hwmon/ltc4282.rst- Extension
.rst- Size
- 5264 bytes
- Lines
- 133
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
.. SPDX-License-Identifier: GPL-2.0-only
Kernel drivers ltc4282
==========================================
Supported chips:
* Analog Devices LTC4282
Prefix: 'ltc4282'
Addresses scanned: -
Datasheet:
https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
Author: Nuno Sá <nuno.sa@analog.com>
Description
___________
The LTC4282 hot swap controller allows a board to be safely inserted and removed
from a live backplane. Using one or more external N-channel pass transistors,
board supply voltage and inrush current are ramped up at an adjustable rate. An
I2C interface and onboard ADC allows for monitoring of board current, voltage,
power, energy and fault status. The device features analog foldback current
limiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate
drive allows high power applications to either share safe operating area across
parallel MOSFETs or support a 2-stage start-up that first charges the load
capacitance followed by enabling a low on-resistance path to the load. The
LTC4282 is well suited to high power applications because the precise monitoring
capability and accurate current limiting reduce the extremes in which both loads
and power supplies must safely operate. Non-volatile configuration allows for
flexibility in the autonomous generation of alerts and response to faults.
Sysfs entries
_____________
The following attributes are supported. Limits are read-write and all the other
attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling
one disables the other and disabling one enables the other.
======================= ==========================================
in0_input Output voltage (mV).
in0_min Undervoltage threshold
in0_max Overvoltage threshold
in0_lowest Lowest measured voltage
in0_highest Highest measured voltage
in0_reset_history Write 1 to reset in0 history.
Also clears fet bad and short fault logs.
in0_min_alarm Undervoltage alarm
in0_max_alarm Overvoltage alarm
in0_enable Enable/Disable VSOURCE monitoring
in0_fault Failure in the MOSFETs. Either bad or shorted FET.
in0_label Channel label (VSOURCE)
in1_input Input voltage (mV).
in1_min Undervoltage threshold
in1_max Overvoltage threshold
in1_lowest Lowest measured voltage
in1_highest Highest measured voltage
in1_reset_history Write 1 to reset in1 history.
Also clears over/undervoltage fault logs.
in1_min_alarm Undervoltage alarm
in1_max_alarm Overvoltage alarm
in1_lcrit_alarm Critical Undervoltage alarm
in1_crit_alarm Critical Overvoltage alarm
in1_enable Enable/Disable VDD monitoring
in1_label Channel label (VDD)
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.