Documentation/misc-devices/xilinx_sdfec.rst

Source file repositories/reference/linux-study-clean/Documentation/misc-devices/xilinx_sdfec.rst

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Documentation/misc-devices/xilinx_sdfec.rst
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Support Tooling And Documentation
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Support Tooling And Documentation: documentation
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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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.. SPDX-License-Identifier: GPL-2.0+

====================
Xilinx SD-FEC Driver
====================

Overview
========

This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.

.. |Ultrascale+ (TM)| unicode:: Ultrascale+ U+2122
   .. with trademark sign

For a full description of SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.xilinx.com/cgi-bin/docs/ipdoc?c=sd_fec;v=latest;d=pg256-sdfec-integrated-block.pdf>`_

This driver supports the following features:

  - Retrieval of the Integrated Block configuration and status information
  - Configuration of LDPC codes
  - Configuration of Turbo decoding
  - Monitoring errors

Missing features, known issues, and limitations of the SD-FEC driver are as
follows:

  - Only allows a single open file handler to any instance of the driver at any time
  - Reset of the SD-FEC Integrated Block is not controlled by this driver
  - Does not support shared LDPC code table wraparound

The device tree entry is described in:
`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml <https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/misc/xlnx%2Csd-fec.yaml>`_


Modes of Operation
------------------

The driver works with the SD-FEC core in two modes of operation:

  - Run-time configuration
  - Programmable Logic (PL) initialization


Run-time Configuration
~~~~~~~~~~~~~~~~~~~~~~

For Run-time configuration the role of driver is to allow the software application to do the following:

	- Load the configuration parameters for either Turbo decode or LDPC encode or decode
	- Activate the SD-FEC core
	- Monitor the SD-FEC core for errors
	- Retrieve the status and configuration of the SD-FEC core

Programmable Logic (PL) Initialization
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

For PL initialization, supporting logic loads configuration parameters for either
the Turbo decode or LDPC encode or decode.  The role of the driver is to allow
the software application to do the following:

	- Activate the SD-FEC core
	- Monitor the SD-FEC core for errors
	- Retrieve the status and configuration of the SD-FEC core


Driver Structure
================

The driver provides a platform device where the ``probe`` and ``remove``
operations are provided.

Annotation

Implementation Notes