Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst

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System: Linux kernel
Corpus path: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst
Extension: .rst
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Lines: 407
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: documentation
Status: atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Touches IRQ or DMA behavior; this matters for the representative real-device path.

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Annotated Snippet

.. include:: <isonum.txt>

=========================================================
DPAA2 (Data Path Acceleration Architecture Gen2) Overview
=========================================================

:Copyright: |copy| 2015 Freescale Semiconductor Inc.
:Copyright: |copy| 2018 NXP

This document provides an overview of the Freescale DPAA2 architecture
and how it is integrated into the Linux kernel.

Introduction
============

DPAA2 is a hardware architecture designed for high-speeed network
packet processing.  DPAA2 consists of sophisticated mechanisms for
processing Ethernet packets, queue management, buffer management,
autonomous L2 switching, virtual Ethernet bridging, and accelerator
(e.g. crypto) sharing.

A DPAA2 hardware component called the Management Complex (or MC) manages the
DPAA2 hardware resources.  The MC provides an object-based abstraction for
software drivers to use the DPAA2 hardware.
The MC uses DPAA2 hardware resources such as queues, buffer pools, and
network ports to create functional objects/devices such as network
interfaces, an L2 switch, or accelerator instances.
The MC provides memory-mapped I/O command interfaces (MC portals)
which DPAA2 software drivers use to operate on DPAA2 objects.

The diagram below shows an overview of the DPAA2 resource management
architecture::

	+--------------------------------------+
	|                  OS                  |
	|                        DPAA2 drivers |
	|                             |        |
	+-----------------------------|--------+
	                              |
	                              | (create,discover,connect
	                              |  config,use,destroy)
	                              |
	                 DPAA2        |
	+------------------------| mc portal |-+
	|                             |        |
	|   +- - - - - - - - - - - - -V- - -+  |
	|   |                               |  |
	|   |   Management Complex (MC)     |  |
	|   |                               |  |
	|   +- - - - - - - - - - - - - - - -+  |
	|                                      |
	| Hardware                  Hardware   |
	| Resources                 Objects    |
	| ---------                 -------    |
	| -queues                   -DPRC      |
	| -buffer pools             -DPMCP     |
	| -Eth MACs/ports           -DPIO      |
	| -network interface        -DPNI      |
	|  profiles                 -DPMAC     |
	| -queue portals            -DPBP      |
	| -MC portals                ...       |
	|  ...                                 |
	|                                      |
	+--------------------------------------+


The MC mediates operations such as create, discover,
connect, configuration, and destroy.  Fast-path operations
on data, such as packet transmit/receive, are not mediated by
the MC and are done directly using memory mapped regions in

Annotation

Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.