Documentation/sound/hd-audio/intel-multi-link.rst
Source file repositories/reference/linux-study-clean/Documentation/sound/hd-audio/intel-multi-link.rst
File Facts
- System
- Linux kernel
- Corpus path
Documentation/sound/hd-audio/intel-multi-link.rst- Extension
.rst- Size
- 16061 bytes
- Lines
- 313
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
.. include:: <isonum.txt>
================================================
HDAudio multi-link extensions on Intel platforms
================================================
:Copyright: |copy| 2023 Intel Corporation
This file documents the 'multi-link structure' introduced in 2015 with
the Skylake processor and recently extended in newer Intel platforms
HDaudio existing link mapping (2015 addition in SkyLake)
========================================================
External HDAudio codecs are handled with link #0, while iDISP codec
for HDMI/DisplayPort is handled with link #1.
The only change to the 2015 definitions is the declaration of the
LCAP.ALT=0x0 - since the ALT bit was previously reserved, this is a
backwards-compatible change.
LCTL.SPA and LCTL.CPA are automatically set when exiting reset. They
are only used in existing drivers when the SCF value needs to be
corrected.
Basic structure for HDaudio codecs
----------------------------------
::
+-----------+
| ML cap #0 |
+-----------+
| ML cap #1 |---+
+-----------+ |
|
+--> 0x0 +---------------+ LCAP
| ALT=0 |
+---------------+
| S192 |
+---------------+
| S96 |
+---------------+
| S48 |
+---------------+
| S24 |
+---------------+
| S12 |
+---------------+
| S6 |
+---------------+
0x4 +---------------+ LCTL
| INTSTS |
+---------------+
| CPA |
+---------------+
| SPA |
+---------------+
| SCF |
+---------------+
0x8 +---------------+ LOSIDV
| L1OSIVD15 |
+---------------+
| L1OSIDV.. |
+---------------+
| L1OSIDV1 |
+---------------+
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.