drivers/accel/amdxdna/aie4_pci.c
Source file repositories/reference/linux-study-clean/drivers/accel/amdxdna/aie4_pci.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/amdxdna/aie4_pci.c- Extension
.c- Size
- 15838 bytes
- Lines
- 668
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/amdxdna_accel.hdrm/drm_managed.hdrm/drm_print.hlinux/firmware.hlinux/sizes.haie.haie4_msg_priv.haie4_pci.hamdxdna_mailbox.hamdxdna_mailbox_helper.hamdxdna_pci_drv.h
Detected Declarations
struct mailbox_infofunction aie4_fw_is_alivefunction aie4_read_mbox_infofunction aie4_mailbox_infofunction aie4_mailbox_finifunction aie4_irq_initfunction aie4_mailbox_startfunction aie4_mailbox_initfunction aie4_fw_stopfunction aie4_fw_startfunction aie4_partition_initfunction aie4_partition_finifunction aie4_queryfunction aie4_pf_hw_startfunction aie4_pf_hw_stopfunction aie4_vf_hw_startfunction aie4_vf_hw_stopfunction aie4_request_firmwarefunction aie4_release_firmwarefunction aie4_prepare_firmwarefunction aie4_load_fwfunction aie4m_pcidev_initfunction aie4_doorbell_mmapfunction aie4_get_infofunction aie4_alloc_work_bufferfunction aie4_free_work_bufferfunction aie4_pf_initfunction aie4_vf_initfunction aie4_pf_finifunction aie4_vf_fini
Annotated Snippet
struct mailbox_info {
__u32 valid;
__u32 protocol_major;
__u32 protocol_minor;
__u32 x2i_tail_offset;
__u32 x2i_head_offset;
__u32 x2i_buffer_addr;
__u32 x2i_buffer_size;
__u32 i2x_tail_offset;
__u32 i2x_head_offset;
__u32 i2x_buffer_addr;
__u32 i2x_buffer_size;
__u32 i2x_msi_idx;
__u32 reserved[4];
};
static int aie4_fw_is_alive(struct amdxdna_dev *xdna)
{
const struct amdxdna_dev_priv *npriv = xdna->dev_info->dev_priv;
struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
u32 __iomem *src;
u32 fw_is_valid;
int ret;
src = ndev->rbuf_base + npriv->mbox_info_off;
ret = readx_poll_timeout(readl, src + offsetof(struct mailbox_info, valid),
fw_is_valid, (fw_is_valid == 0x1),
AIE_INTERVAL, AIE_TIMEOUT);
if (ret)
XDNA_ERR(xdna, "fw_is_valid=%d after %d ms",
fw_is_valid, DIV_ROUND_CLOSEST(AIE_TIMEOUT, 1000000));
return ret;
}
static void aie4_read_mbox_info(struct amdxdna_dev *xdna,
struct mailbox_info *mbox_info)
{
const struct amdxdna_dev_priv *npriv = xdna->dev_info->dev_priv;
struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
u32 *dst = (u32 *)mbox_info;
u32 __iomem *src;
int i;
src = ndev->rbuf_base + npriv->mbox_info_off;
for (i = 0; i < sizeof(*mbox_info) / sizeof(u32); i++)
dst[i] = readl(&src[i]);
}
static int aie4_mailbox_info(struct amdxdna_dev *xdna,
struct mailbox_info *mbox_info)
{
int ret;
ret = aie4_fw_is_alive(xdna);
if (ret)
return ret;
aie4_read_mbox_info(xdna, mbox_info);
ret = aie_check_protocol(&xdna->dev_handle->aie,
mbox_info->protocol_major,
mbox_info->protocol_minor);
if (ret)
XDNA_ERR(xdna, "mailbox major.minor %d.%d is not supported",
mbox_info->protocol_major, mbox_info->protocol_minor);
return ret;
}
static void aie4_mailbox_fini(struct amdxdna_dev_hdl *ndev)
{
struct amdxdna_dev *xdna = ndev->aie.xdna;
aie_destroy_chann(&ndev->aie, &ndev->aie.mgmt_chann);
drmm_kfree(&xdna->ddev, ndev->mbox);
ndev->mbox = NULL;
}
static int aie4_irq_init(struct amdxdna_dev *xdna)
{
struct pci_dev *pdev = to_pci_dev(xdna->ddev.dev);
int ret, nvec;
nvec = pci_msix_vec_count(pdev);
XDNA_DBG(xdna, "irq vectors:%d", nvec);
if (nvec <= 0) {
XDNA_ERR(xdna, "does not get number of interrupt vector");
Annotation
- Immediate include surface: `drm/amdxdna_accel.h`, `drm/drm_managed.h`, `drm/drm_print.h`, `linux/firmware.h`, `linux/sizes.h`, `aie.h`, `aie4_msg_priv.h`, `aie4_pci.h`.
- Detected declarations: `struct mailbox_info`, `function aie4_fw_is_alive`, `function aie4_read_mbox_info`, `function aie4_mailbox_info`, `function aie4_mailbox_fini`, `function aie4_irq_init`, `function aie4_mailbox_start`, `function aie4_mailbox_init`, `function aie4_fw_stop`, `function aie4_fw_start`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.