drivers/accel/amdxdna/amdxdna_mailbox.c
Source file repositories/reference/linux-study-clean/drivers/accel/amdxdna/amdxdna_mailbox.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/amdxdna/amdxdna_mailbox.c- Extension
.c- Size
- 14984 bytes
- Lines
- 583
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_device.hdrm/drm_managed.hlinux/bitfield.hlinux/interrupt.hlinux/iopoll.hlinux/slab.hlinux/xarray.htrace/events/amdxdna.hamdxdna_mailbox.h
Detected Declarations
struct mailboxstruct mailbox_channelstruct xdna_msg_headerstruct mailbox_pkgstruct mailbox_msgenum channel_res_typefunction mailbox_reg_writefunction mailbox_reg_readfunction mailbox_irq_acknowledgefunction mailbox_irq_statusfunction mailbox_set_headptrfunction mailbox_set_tailptrfunction mailbox_get_headptrfunction mailbox_get_tailptrfunction mailbox_get_ringbuf_sizefunction mailbox_validate_msgidfunction mailbox_acquire_msgidfunction mailbox_release_msgidfunction mailbox_release_msgfunction mailbox_send_msgfunction mailbox_get_respfunction mailbox_get_msgfunction mailbox_irq_handlerfunction mailbox_rx_workerfunction xdna_mailbox_send_msgfunction xdna_mailbox_free_channelfunction xdna_mailbox_start_channelfunction xdna_mailbox_stop_channel
Annotated Snippet
struct mailbox {
struct device *dev;
struct xdna_mailbox_res res;
};
struct mailbox_channel {
struct mailbox *mb;
struct xdna_mailbox_chann_res res[CHAN_RES_NUM];
int msix_irq;
u32 iohub_int_addr;
struct xarray chan_xa;
u32 next_msgid;
u32 x2i_tail;
/* Received msg related fields */
struct workqueue_struct *work_q;
struct work_struct rx_work;
u32 i2x_head;
bool bad_state;
};
#define MSG_BODY_SZ GENMASK(10, 0)
#define MSG_PROTO_VER GENMASK(23, 16)
struct xdna_msg_header {
__u32 total_size;
__u32 sz_ver;
__u32 id;
__u32 opcode;
} __packed;
static_assert(sizeof(struct xdna_msg_header) == 16);
struct mailbox_pkg {
struct xdna_msg_header header;
__u32 payload[];
};
/* The protocol version. */
#define MSG_PROTOCOL_VERSION 0x1
/* The tombstone value. */
#define TOMBSTONE 0xDEADFACE
struct mailbox_msg {
void *handle;
int (*notify_cb)(void *handle, void __iomem *data, size_t size);
size_t pkg_size; /* package size in bytes */
struct mailbox_pkg pkg;
};
static void mailbox_reg_write(struct mailbox_channel *mb_chann, u32 mbox_reg, u32 data)
{
struct xdna_mailbox_res *mb_res = &mb_chann->mb->res;
void __iomem *ringbuf_addr = mb_res->mbox_base + mbox_reg;
writel(data, ringbuf_addr);
}
static u32 mailbox_reg_read(struct mailbox_channel *mb_chann, u32 mbox_reg)
{
struct xdna_mailbox_res *mb_res = &mb_chann->mb->res;
void __iomem *ringbuf_addr = mb_res->mbox_base + mbox_reg;
return readl(ringbuf_addr);
}
static inline void mailbox_irq_acknowledge(struct mailbox_channel *mb_chann)
{
if (mb_chann->iohub_int_addr)
mailbox_reg_write(mb_chann, mb_chann->iohub_int_addr, 0);
}
static inline u32 mailbox_irq_status(struct mailbox_channel *mb_chann)
{
return (mb_chann->iohub_int_addr) ?
mailbox_reg_read(mb_chann, mb_chann->iohub_int_addr) : 0;
}
static inline void
mailbox_set_headptr(struct mailbox_channel *mb_chann, u32 headptr_val)
{
mailbox_reg_write(mb_chann, mb_chann->res[CHAN_RES_I2X].mb_head_ptr_reg, headptr_val);
mb_chann->i2x_head = headptr_val;
}
static inline void
mailbox_set_tailptr(struct mailbox_channel *mb_chann, u32 tailptr_val)
{
mailbox_reg_write(mb_chann, mb_chann->res[CHAN_RES_X2I].mb_tail_ptr_reg, tailptr_val);
mb_chann->x2i_tail = tailptr_val;
}
Annotation
- Immediate include surface: `drm/drm_device.h`, `drm/drm_managed.h`, `linux/bitfield.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/slab.h`, `linux/xarray.h`, `trace/events/amdxdna.h`.
- Detected declarations: `struct mailbox`, `struct mailbox_channel`, `struct xdna_msg_header`, `struct mailbox_pkg`, `struct mailbox_msg`, `enum channel_res_type`, `function mailbox_reg_write`, `function mailbox_reg_read`, `function mailbox_irq_acknowledge`, `function mailbox_irq_status`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.