drivers/accel/habanalabs/common/habanalabs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/common/habanalabs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/common/habanalabs.h- Extension
.h- Size
- 166985 bytes
- Lines
- 4299
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/habanalabs/cpucp_if.h../include/common/qman_if.h../include/hw_ip/mmu/mmu_general.huapi/drm/habanalabs_accel.hlinux/cdev.hlinux/iopoll.hlinux/irqreturn.hlinux/dma-direction.hlinux/scatterlist.hlinux/hashtable.hlinux/debugfs.hlinux/rwsem.hlinux/eventfd.hlinux/bitfield.hlinux/genalloc.hlinux/sched/signal.hlinux/io-64-nonatomic-lo-hi.hlinux/coresight.hlinux/dma-buf.hdrm/drm_device.hdrm/drm_file.hsecurity.hhldio.h
Detected Declarations
struct hl_devicestruct hl_fprivstruct iterate_module_ctxstruct hl_block_glbl_secstruct hl_gen_wait_propertiesstruct pgt_infostruct hl_inbound_pci_regionstruct hl_outbound_pci_regionstruct hl_hw_sobstruct hw_queue_propertiesstruct hl_mmu_propertiesstruct hl_hints_rangestruct asic_fixed_propertiesstruct hl_fencestruct hl_cs_complstruct hl_ts_buffstruct hl_mmap_mem_bufstruct hl_mem_mgrstruct hl_mem_mgr_fini_statsstruct hl_mmap_mem_buf_behaviorstruct hl_mmap_mem_bufstruct hl_cbstruct hl_cs_jobstruct hl_sync_stream_propertiesstruct hl_encaps_signals_mgrstruct hl_hw_queuestruct hl_cqstruct hl_ts_free_jobsstruct hl_user_interruptstruct timestamp_reg_free_nodestruct timestamp_reg_work_objstruct timestamp_reg_infostruct hl_user_pending_interruptstruct hl_eqstruct hl_decstruct hl_cs_parserstruct pci_mem_regionstruct static_fw_load_mgrstruct fw_responsestruct dynamic_fw_load_mgrstruct pre_fw_load_propsstruct fw_image_propsstruct fw_load_mgrstruct hl_csstruct engines_datastruct hl_asic_funcsstruct hl_va_rangestruct hl_cs_counters_atomic
Annotated Snippet
* @context_switch: called upon ASID context switch.
* @restore_phase_topology: clear all SOBs amd MONs.
* @debugfs_read_dma: debug interface for reading up to 2MB from the device's
* internal memory via DMA engine.
* @add_device_attr: add ASIC specific device attributes.
* @handle_eqe: handle event queue entry (IRQ) from CPU-CP.
* @get_events_stat: retrieve event queue entries histogram.
* @read_pte: read MMU page table entry from DRAM.
* @write_pte: write MMU page table entry to DRAM.
* @mmu_invalidate_cache: flush MMU STLB host/DRAM cache, either with soft
* (L1 only) or hard (L0 & L1) flush.
* @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with ASID-VA-size mask.
* @mmu_prefetch_cache_range: pre-fetch specific MMU STLB cache lines with ASID-VA-size mask.
* @send_heartbeat: send is-alive packet to CPU-CP and verify response.
* @debug_coresight: perform certain actions on Coresight for debugging.
* @is_device_idle: return true if device is idle, false otherwise.
* @compute_reset_late_init: perform certain actions needed after a compute reset
* @hw_queues_lock: acquire H/W queues lock.
* @hw_queues_unlock: release H/W queues lock.
* @get_pci_id: retrieve PCI ID.
* @get_eeprom_data: retrieve EEPROM data from F/W.
* @get_monitor_dump: retrieve monitor registers dump from F/W.
* @send_cpu_message: send message to F/W. If the message is timedout, the
* driver will eventually reset the device. The timeout can
* be determined by the calling function or it can be 0 and
* then the timeout is the default timeout for the specific
* ASIC
* @get_hw_state: retrieve the H/W state
* @pci_bars_map: Map PCI BARs.
* @init_iatu: Initialize the iATU unit inside the PCI controller.
* @rreg: Read a register. Needed for simulator support.
* @wreg: Write a register. Needed for simulator support.
* @halt_coresight: stop the ETF and ETR traces.
* @ctx_init: context dependent initialization.
* @ctx_fini: context dependent cleanup.
* @pre_schedule_cs: Perform pre-CS-scheduling operations.
* @get_queue_id_for_cq: Get the H/W queue id related to the given CQ index.
* @load_firmware_to_device: load the firmware to the device's memory
* @load_boot_fit_to_device: load boot fit to device's memory
* @get_signal_cb_size: Get signal CB size.
* @get_wait_cb_size: Get wait CB size.
* @gen_signal_cb: Generate a signal CB.
* @gen_wait_cb: Generate a wait CB.
* @reset_sob: Reset a SOB.
* @reset_sob_group: Reset SOB group
* @get_device_time: Get the device time.
* @pb_print_security_errors: print security errors according block and cause
* @collective_wait_init_cs: Generate collective master/slave packets
* and place them in the relevant cs jobs
* @collective_wait_create_jobs: allocate collective wait cs jobs
* @get_dec_base_addr: get the base address of a given decoder.
* @scramble_addr: Routine to scramble the address prior of mapping it
* in the MMU.
* @descramble_addr: Routine to de-scramble the address prior of
* showing it to users.
* @ack_protection_bits_errors: ack and dump all security violations
* @get_hw_block_id: retrieve a HW block id to be used by the user to mmap it.
* also returns the size of the block if caller supplies
* a valid pointer for it
* @hw_block_mmap: mmap a HW block with a given id.
* @enable_events_from_fw: send interrupt to firmware to notify them the
* driver is ready to receive asynchronous events. This
* function should be called during the first init and
* after every hard-reset of the device
* @ack_mmu_errors: check and ack mmu errors, page fault, access violation.
* @get_msi_info: Retrieve asic-specific MSI ID of the f/w async event
* @map_pll_idx_to_fw_idx: convert driver specific per asic PLL index to
* generic f/w compatible PLL Indexes
* @init_firmware_preload_params: initialize pre FW-load parameters.
* @init_firmware_loader: initialize data for FW loader.
* @init_cpu_scrambler_dram: Enable CPU specific DRAM scrambling
* @state_dump_init: initialize constants required for state dump
* @get_sob_addr: get SOB base address offset.
* @set_pci_memory_regions: setting properties of PCI memory regions
* @get_stream_master_qid_arr: get pointer to stream masters QID array
* @check_if_razwi_happened: check if there was a razwi due to RR violation.
* @access_dev_mem: access device memory
* @set_dram_bar_base: set the base of the DRAM BAR
* @set_engine_cores: set a config command to engine cores
* @set_engines: set a config command to user engines
* @send_device_activity: indication to FW about device availability
* @set_dram_properties: set DRAM related properties.
* @set_binning_masks: set binning/enable masks for all relevant components.
*/
struct hl_asic_funcs {
int (*early_init)(struct hl_device *hdev);
int (*early_fini)(struct hl_device *hdev);
int (*late_init)(struct hl_device *hdev);
void (*late_fini)(struct hl_device *hdev);
int (*sw_init)(struct hl_device *hdev);
Annotation
- Immediate include surface: `linux/habanalabs/cpucp_if.h`, `../include/common/qman_if.h`, `../include/hw_ip/mmu/mmu_general.h`, `uapi/drm/habanalabs_accel.h`, `linux/cdev.h`, `linux/iopoll.h`, `linux/irqreturn.h`, `linux/dma-direction.h`.
- Detected declarations: `struct hl_device`, `struct hl_fpriv`, `struct iterate_module_ctx`, `struct hl_block_glbl_sec`, `struct hl_gen_wait_properties`, `struct pgt_info`, `struct hl_inbound_pci_region`, `struct hl_outbound_pci_region`, `struct hl_hw_sob`, `struct hw_queue_properties`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.