drivers/accel/habanalabs/common/mmu/mmu_v2_hr.c

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/common/mmu/mmu_v2_hr.c

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/common/mmu/mmu_v2_hr.c
Extension
.c
Size
11674 bytes
Lines
400
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if ((i < hop_last) && (curr_pte & mmu_prop->last_mask)) {
			hop_last = i;
			is_huge = true;
			break;
		}
	}

	if (is_dram_addr && !is_huge) {
		dev_err(hdev->dev, "DRAM unmapping should use huge pages only\n");
		return -EFAULT;
	}

	if (!(curr_pte & PAGE_PRESENT_MASK))
		goto not_mapped;

	for (i = hop_last ; i > 0 ; i--) {
		hl_mmu_hr_clear_pte(ctx, hops_pgt_info[i], hop_pte_phys_addr[i],
						ctx->hdev->asic_prop.pmmu.hop_table_size);

		if (hl_mmu_hr_put_pte(ctx, hops_pgt_info[i], &ctx->hdev->mmu_priv.hr,
						ctx->hdev->asic_prop.pmmu.hop_table_size))
			goto mapped;
	}
	hl_mmu_hr_clear_pte(ctx, hops_pgt_info[0], hop_pte_phys_addr[0],
						ctx->hdev->asic_prop.pmmu.hop_table_size);

mapped:
	return 0;

not_mapped:
	dev_err(hdev->dev, "virt addr 0x%llx is not mapped to phys addr\n", virt_addr);

	return -EINVAL;
}

static int hl_mmu_v2_get_last_hop(struct hl_mmu_properties *mmu_prop, u32 page_size)
{
	int hop;

	for (hop = (mmu_prop->num_hops - 1); hop; hop--) {
		if (mmu_prop->hop_shifts[hop] == 0)
			continue;

		if (page_size <= (1 << mmu_prop->hop_shifts[hop]))
			break;
	}

	return hop;
}

static int _hl_mmu_v2_hr_map(struct hl_ctx *ctx,
			u64 virt_addr, u64 phys_addr,
			u32 page_size, bool is_dram_addr)
{
	u64 hop_pte_phys_addr[MMU_ARCH_6_HOPS] = { 0 },
		curr_pte = 0, scrambled_virt_addr, scrambled_phys_addr;
	struct pgt_info *hops_pgt_info[MMU_ARCH_6_HOPS] = { NULL };
	bool hop_new[MMU_ARCH_6_HOPS] = { false };
	struct hl_device *hdev = ctx->hdev;
	struct asic_fixed_properties *prop = &hdev->asic_prop;
	struct hl_mmu_properties *mmu_prop;
	int i, hop_last, rc = -ENOMEM;

	/*
	 * This mapping function can map a page or a huge page. For huge page
	 * there are only 4 hops rather than 5. Currently the DRAM allocation
	 * uses huge pages only but user memory could have been allocated with
	 * one of the two page sizes. Since this is a common code for all the
	 * three cases, we need this hugs page check.
	 */
	if (is_dram_addr)
		mmu_prop = &prop->dmmu;
	else if (page_size == prop->pmmu_huge.page_size)
		mmu_prop = &prop->pmmu_huge;
	else
		mmu_prop = &prop->pmmu;

	hop_last = hl_mmu_v2_get_last_hop(mmu_prop, page_size);
	if (hop_last <= 0) {
		dev_err(ctx->hdev->dev, "Invalid last HOP %d\n", hop_last);
		return -EFAULT;
	}

	scrambled_virt_addr = hdev->asic_funcs->scramble_addr(hdev, virt_addr);
	scrambled_phys_addr = hdev->asic_funcs->scramble_addr(hdev, phys_addr);

	for (i = 0 ; i <= hop_last ; i++) {

		if (i == 0)
			hops_pgt_info[i] = hl_mmu_v2_hr_get_hop0_pgt_info(ctx);

Annotation

Implementation Notes