drivers/accel/habanalabs/goya/goya_security.c

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/goya/goya_security.c

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/goya/goya_security.c
Extension
.c
Size
148414 bytes
Lines
3128
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0

/*
 * Copyright 2016-2019 HabanaLabs, Ltd.
 * All Rights Reserved.
 */

#include "goyaP.h"
#include "../include/goya/asic_reg/goya_regs.h"

/*
 * goya_set_block_as_protected - set the given block as protected
 *
 * @hdev: pointer to hl_device structure
 * @block: block base address
 *
 */
static void goya_pb_set_block(struct hl_device *hdev, u64 base)
{
	u32 pb_addr = base - CFG_BASE + PROT_BITS_OFFS;

	while (pb_addr & 0xFFF) {
		WREG32(pb_addr, 0);
		pb_addr += 4;
	}
}

static void goya_init_mme_protection_bits(struct hl_device *hdev)
{
	u32 pb_addr, mask;
	u8 word_offset;

	/* TODO: change to real reg name when Soc Online is updated */
	u64 mmMME_SBB_POWER_ECO1 = 0xDFF60,
		mmMME_SBB_POWER_ECO2 = 0xDFF64;

	goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_0_BASE);
	goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_1_BASE);
	goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_2_BASE);
	goya_pb_set_block(hdev, mmACC_MS_ECC_MEM_3_BASE);

	goya_pb_set_block(hdev, mmSBA_ECC_MEM_BASE);
	goya_pb_set_block(hdev, mmSBB_ECC_MEM_BASE);

	goya_pb_set_block(hdev, mmMME1_RTR_BASE);
	goya_pb_set_block(hdev, mmMME1_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME1_WR_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME2_RTR_BASE);
	goya_pb_set_block(hdev, mmMME2_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME2_WR_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME3_RTR_BASE);
	goya_pb_set_block(hdev, mmMME3_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME3_WR_REGULATOR_BASE);

	goya_pb_set_block(hdev, mmMME4_RTR_BASE);
	goya_pb_set_block(hdev, mmMME4_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME4_WR_REGULATOR_BASE);

	goya_pb_set_block(hdev, mmMME5_RTR_BASE);
	goya_pb_set_block(hdev, mmMME5_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME5_WR_REGULATOR_BASE);

	goya_pb_set_block(hdev, mmMME6_RTR_BASE);
	goya_pb_set_block(hdev, mmMME6_RD_REGULATOR_BASE);
	goya_pb_set_block(hdev, mmMME6_WR_REGULATOR_BASE);

	pb_addr = (mmMME_DUMMY & ~0xFFF) + PROT_BITS_OFFS;
	word_offset = ((mmMME_DUMMY & PROT_BITS_OFFS) >> 7) << 2;
	mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2);
	mask |= 1 << ((mmMME_RESET & 0x7F) >> 2);
	mask |= 1 << ((mmMME_STALL & 0x7F) >> 2);
	mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2);
	mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2);
	mask |= 1 << ((mmMME_DBGMEM_ADD & 0x7F) >> 2);
	mask |= 1 << ((mmMME_DBGMEM_DATA_WR & 0x7F) >> 2);
	mask |= 1 << ((mmMME_DBGMEM_DATA_RD & 0x7F) >> 2);
	mask |= 1 << ((mmMME_DBGMEM_CTRL & 0x7F) >> 2);
	mask |= 1 << ((mmMME_DBGMEM_RC & 0x7F) >> 2);
	mask |= 1 << ((mmMME_LOG_SHADOW & 0x7F) >> 2);

	WREG32(pb_addr + word_offset, ~mask);

	pb_addr = (mmMME_STORE_MAX_CREDIT & ~0xFFF) + PROT_BITS_OFFS;
	word_offset = ((mmMME_STORE_MAX_CREDIT & PROT_BITS_OFFS) >> 7) << 2;
	mask = 1 << ((mmMME_STORE_MAX_CREDIT & 0x7F) >> 2);
	mask |= 1 << ((mmMME_AGU & 0x7F) >> 2);
	mask |= 1 << ((mmMME_SBA & 0x7F) >> 2);
	mask |= 1 << ((mmMME_SBB & 0x7F) >> 2);
	mask |= 1 << ((mmMME_SBC & 0x7F) >> 2);
	mask |= 1 << ((mmMME_WBC & 0x7F) >> 2);

Annotation

Implementation Notes