drivers/accel/habanalabs/include/gaudi/asic_reg/mme1_ctrl_regs.h

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/asic_reg/mme1_ctrl_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/include/gaudi/asic_reg/mme1_ctrl_regs.h
Extension
.h
Size
56428 bytes
Lines
1457
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef ASIC_REG_MME1_CTRL_REGS_H_
#define ASIC_REG_MME1_CTRL_REGS_H_

/*
 *****************************************
 *   MME1_CTRL (Prototype: MME)
 *****************************************
 */

#define mmMME1_CTRL_ARCH_STATUS                                      0xE0000

#define mmMME1_CTRL_ARCH_BASE_ADDR_HIGH_S                            0xE0008

#define mmMME1_CTRL_ARCH_BASE_ADDR_HIGH_L                            0xE000C

#define mmMME1_CTRL_ARCH_BASE_ADDR_HIGH_O                            0xE0010

#define mmMME1_CTRL_ARCH_BASE_ADDR_LOW_S                             0xE0014

#define mmMME1_CTRL_ARCH_BASE_ADDR_LOW_L                             0xE0018

#define mmMME1_CTRL_ARCH_BASE_ADDR_LOW_O                             0xE001C

#define mmMME1_CTRL_ARCH_HEADER_LOW                                  0xE0020

#define mmMME1_CTRL_ARCH_HEADER_HIGH                                 0xE0024

#define mmMME1_CTRL_ARCH_CONV_KERNEL_SIZE_MINUS_1                    0xE0028

#define mmMME1_CTRL_ARCH_CONV_ASSOCIATED_DIMS_LOW                    0xE002C

#define mmMME1_CTRL_ARCH_CONV_ASSOCIATED_DIMS_HIGH                   0xE0030

#define mmMME1_CTRL_ARCH_NUM_ITERATIONS_MINUS_1                      0xE0034

#define mmMME1_CTRL_ARCH_OUTER_LOOP                                  0xE0038

#define mmMME1_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_0                   0xE003C

#define mmMME1_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_1                   0xE0040

#define mmMME1_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_2                   0xE0044

#define mmMME1_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_3                   0xE0048

#define mmMME1_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_4                   0xE004C

#define mmMME1_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_0                      0xE0050

#define mmMME1_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_1                      0xE0054

#define mmMME1_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_2                      0xE0058

#define mmMME1_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_3                      0xE005C

#define mmMME1_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_4                      0xE0060

#define mmMME1_CTRL_ARCH_TENSOR_S_ROI_SIZE_0                         0xE0064

#define mmMME1_CTRL_ARCH_TENSOR_S_ROI_SIZE_1                         0xE0068

#define mmMME1_CTRL_ARCH_TENSOR_S_ROI_SIZE_2                         0xE006C

#define mmMME1_CTRL_ARCH_TENSOR_S_ROI_SIZE_3                         0xE0070

#define mmMME1_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_0                  0xE0074

#define mmMME1_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_1                  0xE0078

#define mmMME1_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_2                  0xE007C

#define mmMME1_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_3                  0xE0080

#define mmMME1_CTRL_ARCH_TENSOR_S_SPATIAL_SIZE_MINUS_1               0xE0084

#define mmMME1_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_0                     0xE0088

#define mmMME1_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_1                     0xE008C

#define mmMME1_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_2                     0xE0090

#define mmMME1_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_3                     0xE0094

#define mmMME1_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_4                     0xE0098

#define mmMME1_CTRL_ARCH_AGU_S_START_OFFSET_0                        0xE009C

#define mmMME1_CTRL_ARCH_AGU_S_START_OFFSET_1                        0xE00A0

#define mmMME1_CTRL_ARCH_AGU_S_START_OFFSET_2                        0xE00A4

Annotation

Implementation Notes