drivers/accel/habanalabs/include/gaudi/asic_reg/mme2_ctrl_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/asic_reg/mme2_ctrl_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi/asic_reg/mme2_ctrl_regs.h- Extension
.h- Size
- 57145 bytes
- Lines
- 1457
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_MME2_CTRL_REGS_H_
#define ASIC_REG_MME2_CTRL_REGS_H_
/*
*****************************************
* MME2_CTRL (Prototype: MME)
*****************************************
*/
#define mmMME2_CTRL_ARCH_STATUS 0x160000
#define mmMME2_CTRL_ARCH_BASE_ADDR_HIGH_S 0x160008
#define mmMME2_CTRL_ARCH_BASE_ADDR_HIGH_L 0x16000C
#define mmMME2_CTRL_ARCH_BASE_ADDR_HIGH_O 0x160010
#define mmMME2_CTRL_ARCH_BASE_ADDR_LOW_S 0x160014
#define mmMME2_CTRL_ARCH_BASE_ADDR_LOW_L 0x160018
#define mmMME2_CTRL_ARCH_BASE_ADDR_LOW_O 0x16001C
#define mmMME2_CTRL_ARCH_HEADER_LOW 0x160020
#define mmMME2_CTRL_ARCH_HEADER_HIGH 0x160024
#define mmMME2_CTRL_ARCH_CONV_KERNEL_SIZE_MINUS_1 0x160028
#define mmMME2_CTRL_ARCH_CONV_ASSOCIATED_DIMS_LOW 0x16002C
#define mmMME2_CTRL_ARCH_CONV_ASSOCIATED_DIMS_HIGH 0x160030
#define mmMME2_CTRL_ARCH_NUM_ITERATIONS_MINUS_1 0x160034
#define mmMME2_CTRL_ARCH_OUTER_LOOP 0x160038
#define mmMME2_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_0 0x16003C
#define mmMME2_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_1 0x160040
#define mmMME2_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_2 0x160044
#define mmMME2_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_3 0x160048
#define mmMME2_CTRL_ARCH_TENSOR_S_VALID_ELEMENTS_4 0x16004C
#define mmMME2_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_0 0x160050
#define mmMME2_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_1 0x160054
#define mmMME2_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_2 0x160058
#define mmMME2_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_3 0x16005C
#define mmMME2_CTRL_ARCH_TENSOR_S_LOOP_STRIDE_4 0x160060
#define mmMME2_CTRL_ARCH_TENSOR_S_ROI_SIZE_0 0x160064
#define mmMME2_CTRL_ARCH_TENSOR_S_ROI_SIZE_1 0x160068
#define mmMME2_CTRL_ARCH_TENSOR_S_ROI_SIZE_2 0x16006C
#define mmMME2_CTRL_ARCH_TENSOR_S_ROI_SIZE_3 0x160070
#define mmMME2_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_0 0x160074
#define mmMME2_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_1 0x160078
#define mmMME2_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_2 0x16007C
#define mmMME2_CTRL_ARCH_TENSOR_S_SPATIAL_STRIDES_3 0x160080
#define mmMME2_CTRL_ARCH_TENSOR_S_SPATIAL_SIZE_MINUS_1 0x160084
#define mmMME2_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_0 0x160088
#define mmMME2_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_1 0x16008C
#define mmMME2_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_2 0x160090
#define mmMME2_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_3 0x160094
#define mmMME2_CTRL_ARCH_AGU_S_ROI_BASE_OFFSET_4 0x160098
#define mmMME2_CTRL_ARCH_AGU_S_START_OFFSET_0 0x16009C
#define mmMME2_CTRL_ARCH_AGU_S_START_OFFSET_1 0x1600A0
#define mmMME2_CTRL_ARCH_AGU_S_START_OFFSET_2 0x1600A4
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.