drivers/accel/habanalabs/include/gaudi/asic_reg/nic2_qm0_regs.h

File Facts

System

Linux kernel

Corpus path

drivers/accel/habanalabs/include/gaudi/asic_reg/nic2_qm0_regs.h

Extension

.h

Size

32573 bytes

Lines

835

Domain

Driver Families

Bucket

drivers/accel

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef ASIC_REG_NIC2_QM0_REGS_H_
#define ASIC_REG_NIC2_QM0_REGS_H_

/*
 *****************************************
 *   NIC2_QM0 (Prototype: QMAN)
 *****************************************
 */

#define mmNIC2_QM0_GLBL_CFG0                                         0xD60000

#define mmNIC2_QM0_GLBL_CFG1                                         0xD60004

#define mmNIC2_QM0_GLBL_PROT                                         0xD60008

#define mmNIC2_QM0_GLBL_ERR_CFG                                      0xD6000C

#define mmNIC2_QM0_GLBL_SECURE_PROPS_0                               0xD60010

#define mmNIC2_QM0_GLBL_SECURE_PROPS_1                               0xD60014

#define mmNIC2_QM0_GLBL_SECURE_PROPS_2                               0xD60018

#define mmNIC2_QM0_GLBL_SECURE_PROPS_3                               0xD6001C

#define mmNIC2_QM0_GLBL_SECURE_PROPS_4                               0xD60020

#define mmNIC2_QM0_GLBL_NON_SECURE_PROPS_0                           0xD60024

#define mmNIC2_QM0_GLBL_NON_SECURE_PROPS_1                           0xD60028

#define mmNIC2_QM0_GLBL_NON_SECURE_PROPS_2                           0xD6002C

#define mmNIC2_QM0_GLBL_NON_SECURE_PROPS_3                           0xD60030

#define mmNIC2_QM0_GLBL_NON_SECURE_PROPS_4                           0xD60034

#define mmNIC2_QM0_GLBL_STS0                                         0xD60038

#define mmNIC2_QM0_GLBL_STS1_0                                       0xD60040

#define mmNIC2_QM0_GLBL_STS1_1                                       0xD60044

#define mmNIC2_QM0_GLBL_STS1_2                                       0xD60048

#define mmNIC2_QM0_GLBL_STS1_3                                       0xD6004C

#define mmNIC2_QM0_GLBL_STS1_4                                       0xD60050

#define mmNIC2_QM0_GLBL_MSG_EN_0                                     0xD60054

#define mmNIC2_QM0_GLBL_MSG_EN_1                                     0xD60058

#define mmNIC2_QM0_GLBL_MSG_EN_2                                     0xD6005C

#define mmNIC2_QM0_GLBL_MSG_EN_3                                     0xD60060

#define mmNIC2_QM0_GLBL_MSG_EN_4                                     0xD60068

#define mmNIC2_QM0_PQ_BASE_LO_0                                      0xD60070

#define mmNIC2_QM0_PQ_BASE_LO_1                                      0xD60074

#define mmNIC2_QM0_PQ_BASE_LO_2                                      0xD60078

#define mmNIC2_QM0_PQ_BASE_LO_3                                      0xD6007C

#define mmNIC2_QM0_PQ_BASE_HI_0                                      0xD60080

#define mmNIC2_QM0_PQ_BASE_HI_1                                      0xD60084

#define mmNIC2_QM0_PQ_BASE_HI_2                                      0xD60088

#define mmNIC2_QM0_PQ_BASE_HI_3                                      0xD6008C

#define mmNIC2_QM0_PQ_SIZE_0                                         0xD60090

#define mmNIC2_QM0_PQ_SIZE_1                                         0xD60094

#define mmNIC2_QM0_PQ_SIZE_2                                         0xD60098

#define mmNIC2_QM0_PQ_SIZE_3                                         0xD6009C

#define mmNIC2_QM0_PQ_PI_0                                           0xD600A0

#define mmNIC2_QM0_PQ_PI_1                                           0xD600A4

#define mmNIC2_QM0_PQ_PI_2                                           0xD600A8

#define mmNIC2_QM0_PQ_PI_3                                           0xD600AC

Annotation

• Atlas domain: Driver Families / drivers/accel.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.