drivers/accel/habanalabs/include/gaudi/asic_reg/nic3_qm0_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/asic_reg/nic3_qm0_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi/asic_reg/nic3_qm0_regs.h- Extension
.h- Size
- 32573 bytes
- Lines
- 835
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_NIC3_QM0_REGS_H_
#define ASIC_REG_NIC3_QM0_REGS_H_
/*
*****************************************
* NIC3_QM0 (Prototype: QMAN)
*****************************************
*/
#define mmNIC3_QM0_GLBL_CFG0 0xDA0000
#define mmNIC3_QM0_GLBL_CFG1 0xDA0004
#define mmNIC3_QM0_GLBL_PROT 0xDA0008
#define mmNIC3_QM0_GLBL_ERR_CFG 0xDA000C
#define mmNIC3_QM0_GLBL_SECURE_PROPS_0 0xDA0010
#define mmNIC3_QM0_GLBL_SECURE_PROPS_1 0xDA0014
#define mmNIC3_QM0_GLBL_SECURE_PROPS_2 0xDA0018
#define mmNIC3_QM0_GLBL_SECURE_PROPS_3 0xDA001C
#define mmNIC3_QM0_GLBL_SECURE_PROPS_4 0xDA0020
#define mmNIC3_QM0_GLBL_NON_SECURE_PROPS_0 0xDA0024
#define mmNIC3_QM0_GLBL_NON_SECURE_PROPS_1 0xDA0028
#define mmNIC3_QM0_GLBL_NON_SECURE_PROPS_2 0xDA002C
#define mmNIC3_QM0_GLBL_NON_SECURE_PROPS_3 0xDA0030
#define mmNIC3_QM0_GLBL_NON_SECURE_PROPS_4 0xDA0034
#define mmNIC3_QM0_GLBL_STS0 0xDA0038
#define mmNIC3_QM0_GLBL_STS1_0 0xDA0040
#define mmNIC3_QM0_GLBL_STS1_1 0xDA0044
#define mmNIC3_QM0_GLBL_STS1_2 0xDA0048
#define mmNIC3_QM0_GLBL_STS1_3 0xDA004C
#define mmNIC3_QM0_GLBL_STS1_4 0xDA0050
#define mmNIC3_QM0_GLBL_MSG_EN_0 0xDA0054
#define mmNIC3_QM0_GLBL_MSG_EN_1 0xDA0058
#define mmNIC3_QM0_GLBL_MSG_EN_2 0xDA005C
#define mmNIC3_QM0_GLBL_MSG_EN_3 0xDA0060
#define mmNIC3_QM0_GLBL_MSG_EN_4 0xDA0068
#define mmNIC3_QM0_PQ_BASE_LO_0 0xDA0070
#define mmNIC3_QM0_PQ_BASE_LO_1 0xDA0074
#define mmNIC3_QM0_PQ_BASE_LO_2 0xDA0078
#define mmNIC3_QM0_PQ_BASE_LO_3 0xDA007C
#define mmNIC3_QM0_PQ_BASE_HI_0 0xDA0080
#define mmNIC3_QM0_PQ_BASE_HI_1 0xDA0084
#define mmNIC3_QM0_PQ_BASE_HI_2 0xDA0088
#define mmNIC3_QM0_PQ_BASE_HI_3 0xDA008C
#define mmNIC3_QM0_PQ_SIZE_0 0xDA0090
#define mmNIC3_QM0_PQ_SIZE_1 0xDA0094
#define mmNIC3_QM0_PQ_SIZE_2 0xDA0098
#define mmNIC3_QM0_PQ_SIZE_3 0xDA009C
#define mmNIC3_QM0_PQ_PI_0 0xDA00A0
#define mmNIC3_QM0_PQ_PI_1 0xDA00A4
#define mmNIC3_QM0_PQ_PI_2 0xDA00A8
#define mmNIC3_QM0_PQ_PI_3 0xDA00AC
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.