drivers/accel/habanalabs/include/gaudi/asic_reg/tpc6_qm_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/asic_reg/tpc6_qm_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi/asic_reg/tpc6_qm_regs.h- Extension
.h- Size
- 32569 bytes
- Lines
- 835
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_TPC6_QM_REGS_H_
#define ASIC_REG_TPC6_QM_REGS_H_
/*
*****************************************
* TPC6_QM (Prototype: QMAN)
*****************************************
*/
#define mmTPC6_QM_GLBL_CFG0 0xF88000
#define mmTPC6_QM_GLBL_CFG1 0xF88004
#define mmTPC6_QM_GLBL_PROT 0xF88008
#define mmTPC6_QM_GLBL_ERR_CFG 0xF8800C
#define mmTPC6_QM_GLBL_SECURE_PROPS_0 0xF88010
#define mmTPC6_QM_GLBL_SECURE_PROPS_1 0xF88014
#define mmTPC6_QM_GLBL_SECURE_PROPS_2 0xF88018
#define mmTPC6_QM_GLBL_SECURE_PROPS_3 0xF8801C
#define mmTPC6_QM_GLBL_SECURE_PROPS_4 0xF88020
#define mmTPC6_QM_GLBL_NON_SECURE_PROPS_0 0xF88024
#define mmTPC6_QM_GLBL_NON_SECURE_PROPS_1 0xF88028
#define mmTPC6_QM_GLBL_NON_SECURE_PROPS_2 0xF8802C
#define mmTPC6_QM_GLBL_NON_SECURE_PROPS_3 0xF88030
#define mmTPC6_QM_GLBL_NON_SECURE_PROPS_4 0xF88034
#define mmTPC6_QM_GLBL_STS0 0xF88038
#define mmTPC6_QM_GLBL_STS1_0 0xF88040
#define mmTPC6_QM_GLBL_STS1_1 0xF88044
#define mmTPC6_QM_GLBL_STS1_2 0xF88048
#define mmTPC6_QM_GLBL_STS1_3 0xF8804C
#define mmTPC6_QM_GLBL_STS1_4 0xF88050
#define mmTPC6_QM_GLBL_MSG_EN_0 0xF88054
#define mmTPC6_QM_GLBL_MSG_EN_1 0xF88058
#define mmTPC6_QM_GLBL_MSG_EN_2 0xF8805C
#define mmTPC6_QM_GLBL_MSG_EN_3 0xF88060
#define mmTPC6_QM_GLBL_MSG_EN_4 0xF88068
#define mmTPC6_QM_PQ_BASE_LO_0 0xF88070
#define mmTPC6_QM_PQ_BASE_LO_1 0xF88074
#define mmTPC6_QM_PQ_BASE_LO_2 0xF88078
#define mmTPC6_QM_PQ_BASE_LO_3 0xF8807C
#define mmTPC6_QM_PQ_BASE_HI_0 0xF88080
#define mmTPC6_QM_PQ_BASE_HI_1 0xF88084
#define mmTPC6_QM_PQ_BASE_HI_2 0xF88088
#define mmTPC6_QM_PQ_BASE_HI_3 0xF8808C
#define mmTPC6_QM_PQ_SIZE_0 0xF88090
#define mmTPC6_QM_PQ_SIZE_1 0xF88094
#define mmTPC6_QM_PQ_SIZE_2 0xF88098
#define mmTPC6_QM_PQ_SIZE_3 0xF8809C
#define mmTPC6_QM_PQ_PI_0 0xF880A0
#define mmTPC6_QM_PQ_PI_1 0xF880A4
#define mmTPC6_QM_PQ_PI_2 0xF880A8
#define mmTPC6_QM_PQ_PI_3 0xF880AC
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.