drivers/accel/habanalabs/include/gaudi/asic_reg/tpc7_qm_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/asic_reg/tpc7_qm_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi/asic_reg/tpc7_qm_regs.h- Extension
.h- Size
- 32569 bytes
- Lines
- 835
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_TPC7_QM_REGS_H_
#define ASIC_REG_TPC7_QM_REGS_H_
/*
*****************************************
* TPC7_QM (Prototype: QMAN)
*****************************************
*/
#define mmTPC7_QM_GLBL_CFG0 0xFC8000
#define mmTPC7_QM_GLBL_CFG1 0xFC8004
#define mmTPC7_QM_GLBL_PROT 0xFC8008
#define mmTPC7_QM_GLBL_ERR_CFG 0xFC800C
#define mmTPC7_QM_GLBL_SECURE_PROPS_0 0xFC8010
#define mmTPC7_QM_GLBL_SECURE_PROPS_1 0xFC8014
#define mmTPC7_QM_GLBL_SECURE_PROPS_2 0xFC8018
#define mmTPC7_QM_GLBL_SECURE_PROPS_3 0xFC801C
#define mmTPC7_QM_GLBL_SECURE_PROPS_4 0xFC8020
#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_0 0xFC8024
#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_1 0xFC8028
#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_2 0xFC802C
#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_3 0xFC8030
#define mmTPC7_QM_GLBL_NON_SECURE_PROPS_4 0xFC8034
#define mmTPC7_QM_GLBL_STS0 0xFC8038
#define mmTPC7_QM_GLBL_STS1_0 0xFC8040
#define mmTPC7_QM_GLBL_STS1_1 0xFC8044
#define mmTPC7_QM_GLBL_STS1_2 0xFC8048
#define mmTPC7_QM_GLBL_STS1_3 0xFC804C
#define mmTPC7_QM_GLBL_STS1_4 0xFC8050
#define mmTPC7_QM_GLBL_MSG_EN_0 0xFC8054
#define mmTPC7_QM_GLBL_MSG_EN_1 0xFC8058
#define mmTPC7_QM_GLBL_MSG_EN_2 0xFC805C
#define mmTPC7_QM_GLBL_MSG_EN_3 0xFC8060
#define mmTPC7_QM_GLBL_MSG_EN_4 0xFC8068
#define mmTPC7_QM_PQ_BASE_LO_0 0xFC8070
#define mmTPC7_QM_PQ_BASE_LO_1 0xFC8074
#define mmTPC7_QM_PQ_BASE_LO_2 0xFC8078
#define mmTPC7_QM_PQ_BASE_LO_3 0xFC807C
#define mmTPC7_QM_PQ_BASE_HI_0 0xFC8080
#define mmTPC7_QM_PQ_BASE_HI_1 0xFC8084
#define mmTPC7_QM_PQ_BASE_HI_2 0xFC8088
#define mmTPC7_QM_PQ_BASE_HI_3 0xFC808C
#define mmTPC7_QM_PQ_SIZE_0 0xFC8090
#define mmTPC7_QM_PQ_SIZE_1 0xFC8094
#define mmTPC7_QM_PQ_SIZE_2 0xFC8098
#define mmTPC7_QM_PQ_SIZE_3 0xFC809C
#define mmTPC7_QM_PQ_PI_0 0xFC80A0
#define mmTPC7_QM_PQ_PI_1 0xFC80A4
#define mmTPC7_QM_PQ_PI_2 0xFC80A8
#define mmTPC7_QM_PQ_PI_3 0xFC80AC
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.