drivers/accel/habanalabs/include/gaudi/gaudi_coresight.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi/gaudi_coresight.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi/gaudi_coresight.h- Extension
.h- Size
- 8439 bytes
- Lines
- 368
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum gaudi_debug_stm_regs_indexenum gaudi_debug_etf_regs_indexenum gaudi_debug_funnel_regs_indexenum gaudi_debug_bmon_regs_indexenum gaudi_debug_spmu_regs_index
Annotated Snippet
#ifndef GAUDI_CORESIGHT_H
#define GAUDI_CORESIGHT_H
enum gaudi_debug_stm_regs_index {
GAUDI_STM_FIRST = 0,
GAUDI_STM_MME0_ACC = GAUDI_STM_FIRST,
GAUDI_STM_MME0_SBAB,
GAUDI_STM_MME0_CTRL,
GAUDI_STM_MME1_ACC,
GAUDI_STM_MME1_SBAB,
GAUDI_STM_MME1_CTRL,
GAUDI_STM_MME2_ACC,
GAUDI_STM_MME2_SBAB,
GAUDI_STM_MME2_CTRL,
GAUDI_STM_MME3_ACC,
GAUDI_STM_MME3_SBAB,
GAUDI_STM_MME3_CTRL,
GAUDI_STM_DMA_IF_W_S,
GAUDI_STM_DMA_IF_E_S,
GAUDI_STM_DMA_IF_W_N,
GAUDI_STM_DMA_IF_E_N,
GAUDI_STM_CPU,
GAUDI_STM_DMA_CH_0_CS,
GAUDI_STM_DMA_CH_1_CS,
GAUDI_STM_DMA_CH_2_CS,
GAUDI_STM_DMA_CH_3_CS,
GAUDI_STM_DMA_CH_4_CS,
GAUDI_STM_DMA_CH_5_CS,
GAUDI_STM_DMA_CH_6_CS,
GAUDI_STM_DMA_CH_7_CS,
GAUDI_STM_PCIE,
GAUDI_STM_MMU_CS,
GAUDI_STM_PSOC,
GAUDI_STM_NIC0_0,
GAUDI_STM_NIC0_1,
GAUDI_STM_NIC1_0,
GAUDI_STM_NIC1_1,
GAUDI_STM_NIC2_0,
GAUDI_STM_NIC2_1,
GAUDI_STM_NIC3_0,
GAUDI_STM_NIC3_1,
GAUDI_STM_NIC4_0,
GAUDI_STM_NIC4_1,
GAUDI_STM_TPC0_EML,
GAUDI_STM_TPC1_EML,
GAUDI_STM_TPC2_EML,
GAUDI_STM_TPC3_EML,
GAUDI_STM_TPC4_EML,
GAUDI_STM_TPC5_EML,
GAUDI_STM_TPC6_EML,
GAUDI_STM_TPC7_EML,
GAUDI_STM_LAST = GAUDI_STM_TPC7_EML
};
enum gaudi_debug_etf_regs_index {
GAUDI_ETF_FIRST = 0,
GAUDI_ETF_MME0_ACC = GAUDI_ETF_FIRST,
GAUDI_ETF_MME0_SBAB,
GAUDI_ETF_MME0_CTRL,
GAUDI_ETF_MME1_ACC,
GAUDI_ETF_MME1_SBAB,
GAUDI_ETF_MME1_CTRL,
GAUDI_ETF_MME2_ACC,
GAUDI_ETF_MME2_SBAB,
GAUDI_ETF_MME2_CTRL,
GAUDI_ETF_MME3_ACC,
GAUDI_ETF_MME3_SBAB,
GAUDI_ETF_MME3_CTRL,
GAUDI_ETF_DMA_IF_W_S,
GAUDI_ETF_DMA_IF_E_S,
GAUDI_ETF_DMA_IF_W_N,
GAUDI_ETF_DMA_IF_E_N,
GAUDI_ETF_CPU_0,
GAUDI_ETF_CPU_1,
GAUDI_ETF_CPU_TRACE,
GAUDI_ETF_DMA_CH_0_CS,
GAUDI_ETF_DMA_CH_1_CS,
GAUDI_ETF_DMA_CH_2_CS,
GAUDI_ETF_DMA_CH_3_CS,
GAUDI_ETF_DMA_CH_4_CS,
GAUDI_ETF_DMA_CH_5_CS,
GAUDI_ETF_DMA_CH_6_CS,
GAUDI_ETF_DMA_CH_7_CS,
GAUDI_ETF_PCIE,
GAUDI_ETF_MMU_CS,
GAUDI_ETF_PSOC,
GAUDI_ETF_NIC0_0,
GAUDI_ETF_NIC0_1,
GAUDI_ETF_NIC1_0,
GAUDI_ETF_NIC1_1,
Annotation
- Detected declarations: `enum gaudi_debug_stm_regs_index`, `enum gaudi_debug_etf_regs_index`, `enum gaudi_debug_funnel_regs_index`, `enum gaudi_debug_bmon_regs_index`, `enum gaudi_debug_spmu_regs_index`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.