drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_agu_cout0_slave_regs.h

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_agu_cout0_slave_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_agu_cout0_slave_regs.h
Extension
.h
Size
1031 bytes
Lines
34
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_REGS_H_
#define ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_REGS_H_

/*
 *****************************************
 *   DCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE
 *   (Prototype: MME_AGU_CORE)
 *****************************************
 */

#define mmDCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_ROI_BASE_OFFSET_0 0x40CB240

#define mmDCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_ROI_BASE_OFFSET_1 0x40CB244

#define mmDCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_ROI_BASE_OFFSET_2 0x40CB248

#define mmDCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_ROI_BASE_OFFSET_3 0x40CB24C

#define mmDCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_ROI_BASE_OFFSET_4 0x40CB250

#endif /* ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_AGU_COUT0_SLAVE_REGS_H_ */

Annotation

Implementation Notes