drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_base_addr_regs.h

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_base_addr_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_mme_ctrl_lo_arch_base_addr_regs.h
Extension
.h
Size
1130 bytes
Lines
40
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_REGS_H_
#define ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_REGS_H_

/*
 *****************************************
 *   DCORE0_MME_CTRL_LO_ARCH_BASE_ADDR
 *   (Prototype: MME_ADDRESS_DESCRIPTOR)
 *****************************************
 */

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_COUT1_LOW 0x40CB008

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_COUT1_HIGH 0x40CB00C

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_COUT0_LOW 0x40CB010

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_COUT0_HIGH 0x40CB014

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_A_LOW 0x40CB018

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_A_HIGH 0x40CB01C

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_B_LOW 0x40CB020

#define mmDCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_B_HIGH 0x40CB024

#endif /* ASIC_REG_DCORE0_MME_CTRL_LO_ARCH_BASE_ADDR_REGS_H_ */

Annotation

Implementation Notes