drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_cfg_kernel_regs.h

File Facts

System

Linux kernel

Corpus path

drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_cfg_kernel_regs.h

Extension

.h

Size

3500 bytes

Lines

130

Domain

Driver Families

Bucket

drivers/accel

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef ASIC_REG_DCORE0_TPC0_CFG_KERNEL_REGS_H_
#define ASIC_REG_DCORE0_TPC0_CFG_KERNEL_REGS_H_

/*
 *****************************************
 *   DCORE0_TPC0_CFG_KERNEL
 *   (Prototype: TPC_NON_TENSOR_DESCRIPTOR)
 *****************************************
 */

#define mmDCORE0_TPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW 0x400B508

#define mmDCORE0_TPC0_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH 0x400B50C

#define mmDCORE0_TPC0_CFG_KERNEL_TID_BASE_DIM_0 0x400B510

#define mmDCORE0_TPC0_CFG_KERNEL_TID_SIZE_DIM_0 0x400B514

#define mmDCORE0_TPC0_CFG_KERNEL_TID_BASE_DIM_1 0x400B518

#define mmDCORE0_TPC0_CFG_KERNEL_TID_SIZE_DIM_1 0x400B51C

#define mmDCORE0_TPC0_CFG_KERNEL_TID_BASE_DIM_2 0x400B520

#define mmDCORE0_TPC0_CFG_KERNEL_TID_SIZE_DIM_2 0x400B524

#define mmDCORE0_TPC0_CFG_KERNEL_TID_BASE_DIM_3 0x400B528

#define mmDCORE0_TPC0_CFG_KERNEL_TID_SIZE_DIM_3 0x400B52C

#define mmDCORE0_TPC0_CFG_KERNEL_TID_BASE_DIM_4 0x400B530

#define mmDCORE0_TPC0_CFG_KERNEL_TID_SIZE_DIM_4 0x400B534

#define mmDCORE0_TPC0_CFG_KERNEL_KERNEL_CONFIG 0x400B538

#define mmDCORE0_TPC0_CFG_KERNEL_KERNEL_ID 0x400B53C

#define mmDCORE0_TPC0_CFG_KERNEL_POWER_LOOP 0x400B540

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_0 0x400B544

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_1 0x400B548

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_2 0x400B54C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_3 0x400B550

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_4 0x400B554

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_5 0x400B558

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_6 0x400B55C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_7 0x400B560

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_8 0x400B564

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_9 0x400B568

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_10 0x400B56C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_11 0x400B570

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_12 0x400B574

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_13 0x400B578

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_14 0x400B57C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_15 0x400B580

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_16 0x400B584

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_17 0x400B588

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_18 0x400B58C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_19 0x400B590

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_20 0x400B594

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_21 0x400B598

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_22 0x400B59C

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_23 0x400B5A0

#define mmDCORE0_TPC0_CFG_KERNEL_SRF_24 0x400B5A4

Annotation

• Atlas domain: Driver Families / drivers/accel.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.