drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_eml_busmon_0_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_eml_busmon_0_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_eml_busmon_0_regs.h- Extension
.h- Size
- 4177 bytes
- Lines
- 164
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_DCORE0_TPC0_EML_BUSMON_0_REGS_H_
#define ASIC_REG_DCORE0_TPC0_EML_BUSMON_0_REGS_H_
/*
*****************************************
* DCORE0_TPC0_EML_BUSMON_0
* (Prototype: BMON)
*****************************************
*/
#define mmDCORE0_TPC0_EML_BUSMON_0_CR 0x7000
#define mmDCORE0_TPC0_EML_BUSMON_0_REG_RESET 0x7004
#define mmDCORE0_TPC0_EML_BUSMON_0_INT_CLR 0x7008
#define mmDCORE0_TPC0_EML_BUSMON_0_TRIG_TH 0x700C
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S0 0x7020
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S0 0x7024
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E0 0x7028
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E0 0x702C
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S1 0x7030
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S1 0x7034
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E1 0x7038
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E1 0x703C
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S2 0x7040
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S2 0x7044
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E2 0x7048
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E2 0x704C
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S3 0x7050
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S3 0x7054
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E3 0x7058
#define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E3 0x705C
#define mmDCORE0_TPC0_EML_BUSMON_0_REDUCTION 0x7060
#define mmDCORE0_TPC0_EML_BUSMON_0_IDL 0x7070
#define mmDCORE0_TPC0_EML_BUSMON_0_IDH 0x7074
#define mmDCORE0_TPC0_EML_BUSMON_0_IDENL 0x7078
#define mmDCORE0_TPC0_EML_BUSMON_0_IDENH 0x707C
#define mmDCORE0_TPC0_EML_BUSMON_0_LATENCY_SMP 0x7090
#define mmDCORE0_TPC0_EML_BUSMON_0_ATTR 0x7100
#define mmDCORE0_TPC0_EML_BUSMON_0_ATTREN 0x7104
#define mmDCORE0_TPC0_EML_BUSMON_0_USRENL 0x7108
#define mmDCORE0_TPC0_EML_BUSMON_0_USRL 0x710C
#define mmDCORE0_TPC0_EML_BUSMON_0_USRENH 0x7120
#define mmDCORE0_TPC0_EML_BUSMON_0_USRH 0x7124
#define mmDCORE0_TPC0_EML_BUSMON_0_CAPTURE 0x7200
#define mmDCORE0_TPC0_EML_BUSMON_0_RELEASE 0x7204
#define mmDCORE0_TPC0_EML_BUSMON_0_WIN_CAPTURE 0x7208
#define mmDCORE0_TPC0_EML_BUSMON_0_BW_WIN 0x720C
#define mmDCORE0_TPC0_EML_BUSMON_0_MATCH_CNT_SOD 0x7220
#define mmDCORE0_TPC0_EML_BUSMON_0_MATCH_CNT_WIN 0x7224
#define mmDCORE0_TPC0_EML_BUSMON_0_CYCCNT_L 0x7228
#define mmDCORE0_TPC0_EML_BUSMON_0_CYCCNT_H 0x722C
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.