drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_qm_regs.h

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_qm_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_qm_regs.h
Extension
.h
Size
28411 bytes
Lines
1058
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef ASIC_REG_DCORE0_TPC0_QM_REGS_H_
#define ASIC_REG_DCORE0_TPC0_QM_REGS_H_

/*
 *****************************************
 *   DCORE0_TPC0_QM
 *   (Prototype: QMAN)
 *****************************************
 */

#define mmDCORE0_TPC0_QM_GLBL_CFG0 0x400A000

#define mmDCORE0_TPC0_QM_GLBL_CFG1 0x400A004

#define mmDCORE0_TPC0_QM_GLBL_CFG2 0x400A008

#define mmDCORE0_TPC0_QM_GLBL_ERR_CFG 0x400A00C

#define mmDCORE0_TPC0_QM_GLBL_ERR_CFG1 0x400A010

#define mmDCORE0_TPC0_QM_GLBL_ERR_ARC_HALT_EN 0x400A014

#define mmDCORE0_TPC0_QM_GLBL_AXCACHE 0x400A018

#define mmDCORE0_TPC0_QM_GLBL_STS0 0x400A01C

#define mmDCORE0_TPC0_QM_GLBL_STS1 0x400A020

#define mmDCORE0_TPC0_QM_GLBL_ERR_STS_0 0x400A024

#define mmDCORE0_TPC0_QM_GLBL_ERR_STS_1 0x400A028

#define mmDCORE0_TPC0_QM_GLBL_ERR_STS_2 0x400A02C

#define mmDCORE0_TPC0_QM_GLBL_ERR_STS_3 0x400A030

#define mmDCORE0_TPC0_QM_GLBL_ERR_STS_4 0x400A034

#define mmDCORE0_TPC0_QM_GLBL_ERR_MSG_EN_0 0x400A038

#define mmDCORE0_TPC0_QM_GLBL_ERR_MSG_EN_1 0x400A03C

#define mmDCORE0_TPC0_QM_GLBL_ERR_MSG_EN_2 0x400A040

#define mmDCORE0_TPC0_QM_GLBL_ERR_MSG_EN_3 0x400A044

#define mmDCORE0_TPC0_QM_GLBL_ERR_MSG_EN_4 0x400A048

#define mmDCORE0_TPC0_QM_GLBL_PROT 0x400A04C

#define mmDCORE0_TPC0_QM_PQ_BASE_LO_0 0x400A050

#define mmDCORE0_TPC0_QM_PQ_BASE_LO_1 0x400A054

#define mmDCORE0_TPC0_QM_PQ_BASE_LO_2 0x400A058

#define mmDCORE0_TPC0_QM_PQ_BASE_LO_3 0x400A05C

#define mmDCORE0_TPC0_QM_PQ_BASE_HI_0 0x400A060

#define mmDCORE0_TPC0_QM_PQ_BASE_HI_1 0x400A064

#define mmDCORE0_TPC0_QM_PQ_BASE_HI_2 0x400A068

#define mmDCORE0_TPC0_QM_PQ_BASE_HI_3 0x400A06C

#define mmDCORE0_TPC0_QM_PQ_SIZE_0 0x400A070

#define mmDCORE0_TPC0_QM_PQ_SIZE_1 0x400A074

#define mmDCORE0_TPC0_QM_PQ_SIZE_2 0x400A078

#define mmDCORE0_TPC0_QM_PQ_SIZE_3 0x400A07C

#define mmDCORE0_TPC0_QM_PQ_PI_0 0x400A080

#define mmDCORE0_TPC0_QM_PQ_PI_1 0x400A084

#define mmDCORE0_TPC0_QM_PQ_PI_2 0x400A088

#define mmDCORE0_TPC0_QM_PQ_PI_3 0x400A08C

#define mmDCORE0_TPC0_QM_PQ_CI_0 0x400A090

#define mmDCORE0_TPC0_QM_PQ_CI_1 0x400A094

#define mmDCORE0_TPC0_QM_PQ_CI_2 0x400A098

#define mmDCORE0_TPC0_QM_PQ_CI_3 0x400A09C

Annotation

Implementation Notes