drivers/accel/habanalabs/include/gaudi2/asic_reg/nic0_qpc0_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/nic0_qpc0_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/nic0_qpc0_regs.h- Extension
.h- Size
- 22207 bytes
- Lines
- 906
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_NIC0_QPC0_REGS_H_
#define ASIC_REG_NIC0_QPC0_REGS_H_
/*
*****************************************
* NIC0_QPC0
* (Prototype: NIC_QPC)
*****************************************
*/
#define mmNIC0_QPC0_REQ_QPC_CACHE_INVALIDATE 0x541F000
#define mmNIC0_QPC0_REQ_QPC_CACHE_INV_STATUS 0x541F004
#define mmNIC0_QPC0_REQ_STATIC_CONFIG 0x541F008
#define mmNIC0_QPC0_REQ_BASE_ADDRESS_63_32 0x541F00C
#define mmNIC0_QPC0_REQ_BASE_ADDRESS_31_7 0x541F010
#define mmNIC0_QPC0_REQ_CLEAN_LINK_LIST 0x541F014
#define mmNIC0_QPC0_REQ_ERR_FIFO_PUSH_63_32 0x541F018
#define mmNIC0_QPC0_REQ_ERR_FIFO_PUSH_31_0 0x541F01C
#define mmNIC0_QPC0_REQ_ERR_QP_STATE_63_32 0x541F020
#define mmNIC0_QPC0_REQ_ERR_QP_STATE_31_0 0x541F024
#define mmNIC0_QPC0_RETRY_COUNT_MAX 0x541F028
#define mmNIC0_QPC0_AXI_PROT 0x541F030
#define mmNIC0_QPC0_RES_QPC_CACHE_INVALIDATE 0x541F034
#define mmNIC0_QPC0_RES_QPC_CACHE_INV_STATUS 0x541F038
#define mmNIC0_QPC0_RES_STATIC_CONFIG 0x541F03C
#define mmNIC0_QPC0_RES_BASE_ADDRESS_63_32 0x541F040
#define mmNIC0_QPC0_RES_BASE_ADDRESS_31_7 0x541F044
#define mmNIC0_QPC0_RES_CLEAN_LINK_LIST 0x541F048
#define mmNIC0_QPC0_ERR_FIFO_WRITE_INDEX 0x541F050
#define mmNIC0_QPC0_ERR_FIFO_PRODUCER_INDEX 0x541F054
#define mmNIC0_QPC0_ERR_FIFO_CONSUMER_INDEX 0x541F058
#define mmNIC0_QPC0_ERR_FIFO_MASK 0x541F05C
#define mmNIC0_QPC0_ERR_FIFO_CREDIT 0x541F060
#define mmNIC0_QPC0_ERR_FIFO_CFG 0x541F064
#define mmNIC0_QPC0_ERR_FIFO_INTR_MASK 0x541F068
#define mmNIC0_QPC0_ERR_FIFO_BASE_ADDR_63_32 0x541F06C
#define mmNIC0_QPC0_ERR_FIFO_BASE_ADDR_31_7 0x541F070
#define mmNIC0_QPC0_GW_BUSY 0x541F080
#define mmNIC0_QPC0_GW_CTRL 0x541F084
#define mmNIC0_QPC0_GW_DATA_0 0x541F08C
#define mmNIC0_QPC0_GW_DATA_1 0x541F090
#define mmNIC0_QPC0_GW_DATA_2 0x541F094
#define mmNIC0_QPC0_GW_DATA_3 0x541F098
#define mmNIC0_QPC0_GW_DATA_4 0x541F09C
#define mmNIC0_QPC0_GW_DATA_5 0x541F0A0
#define mmNIC0_QPC0_GW_DATA_6 0x541F0A4
#define mmNIC0_QPC0_GW_DATA_7 0x541F0A8
#define mmNIC0_QPC0_GW_DATA_8 0x541F0AC
#define mmNIC0_QPC0_GW_DATA_9 0x541F0B0
#define mmNIC0_QPC0_GW_DATA_10 0x541F0B4
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.