drivers/accel/habanalabs/include/gaudi2/asic_reg/pdma0_qm_arc_aux_regs.h

Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/gaudi2/asic_reg/pdma0_qm_arc_aux_regs.h

File Facts

System
Linux kernel
Corpus path
drivers/accel/habanalabs/include/gaudi2/asic_reg/pdma0_qm_arc_aux_regs.h
Extension
.h
Size
16727 bytes
Lines
592
Domain
Driver Families
Bucket
drivers/accel
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef ASIC_REG_PDMA0_QM_ARC_AUX_REGS_H_
#define ASIC_REG_PDMA0_QM_ARC_AUX_REGS_H_

/*
 *****************************************
 *   PDMA0_QM_ARC_AUX
 *   (Prototype: QMAN_ARC_AUX)
 *****************************************
 */

#define mmPDMA0_QM_ARC_AUX_RUN_HALT_REQ 0x4C88100

#define mmPDMA0_QM_ARC_AUX_RUN_HALT_ACK 0x4C88104

#define mmPDMA0_QM_ARC_AUX_RST_VEC_ADDR 0x4C88108

#define mmPDMA0_QM_ARC_AUX_DBG_MODE 0x4C8810C

#define mmPDMA0_QM_ARC_AUX_CLUSTER_NUM 0x4C88110

#define mmPDMA0_QM_ARC_AUX_ARC_NUM 0x4C88114

#define mmPDMA0_QM_ARC_AUX_WAKE_UP_EVENT 0x4C88118

#define mmPDMA0_QM_ARC_AUX_DCCM_SYS_ADDR_BASE 0x4C8811C

#define mmPDMA0_QM_ARC_AUX_CTI_AP_STS 0x4C88120

#define mmPDMA0_QM_ARC_AUX_CTI_CFG_MUX_SEL 0x4C88124

#define mmPDMA0_QM_ARC_AUX_ARC_RST 0x4C88128

#define mmPDMA0_QM_ARC_AUX_ARC_RST_REQ 0x4C8812C

#define mmPDMA0_QM_ARC_AUX_SRAM_LSB_ADDR 0x4C88130

#define mmPDMA0_QM_ARC_AUX_SRAM_MSB_ADDR 0x4C88134

#define mmPDMA0_QM_ARC_AUX_PCIE_LSB_ADDR 0x4C88138

#define mmPDMA0_QM_ARC_AUX_PCIE_MSB_ADDR 0x4C8813C

#define mmPDMA0_QM_ARC_AUX_CFG_LSB_ADDR 0x4C88140

#define mmPDMA0_QM_ARC_AUX_CFG_MSB_ADDR 0x4C88144

#define mmPDMA0_QM_ARC_AUX_HBM0_LSB_ADDR 0x4C88150

#define mmPDMA0_QM_ARC_AUX_HBM0_MSB_ADDR 0x4C88154

#define mmPDMA0_QM_ARC_AUX_HBM1_LSB_ADDR 0x4C88158

#define mmPDMA0_QM_ARC_AUX_HBM1_MSB_ADDR 0x4C8815C

#define mmPDMA0_QM_ARC_AUX_HBM2_LSB_ADDR 0x4C88160

#define mmPDMA0_QM_ARC_AUX_HBM2_MSB_ADDR 0x4C88164

#define mmPDMA0_QM_ARC_AUX_HBM3_LSB_ADDR 0x4C88168

#define mmPDMA0_QM_ARC_AUX_HBM3_MSB_ADDR 0x4C8816C

#define mmPDMA0_QM_ARC_AUX_HBM0_OFFSET 0x4C88170

#define mmPDMA0_QM_ARC_AUX_HBM1_OFFSET 0x4C88174

#define mmPDMA0_QM_ARC_AUX_HBM2_OFFSET 0x4C88178

#define mmPDMA0_QM_ARC_AUX_HBM3_OFFSET 0x4C8817C

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_0 0x4C88180

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_1 0x4C88184

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_2 0x4C88188

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_3 0x4C8818C

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_4 0x4C88190

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_5 0x4C88194

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_LSB_ADDR_6 0x4C88198

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_MSB_ADDR_0 0x4C8819C

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_MSB_ADDR_1 0x4C881A0

#define mmPDMA0_QM_ARC_AUX_GENERAL_PURPOSE_MSB_ADDR_2 0x4C881A4

Annotation

Implementation Notes