drivers/accel/habanalabs/include/goya/asic_reg/psoc_etr_regs.h

File Facts

System

Linux kernel

Corpus path

drivers/accel/habanalabs/include/goya/asic_reg/psoc_etr_regs.h

Extension

.h

Size

4178 bytes

Lines

115

Domain

Driver Families

Bucket

drivers/accel

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef ASIC_REG_PSOC_ETR_REGS_H_
#define ASIC_REG_PSOC_ETR_REGS_H_

/*
 *****************************************
 *   PSOC_ETR (Prototype: ETR)
 *****************************************
 */

#define mmPSOC_ETR_RSZ                                               0x2C43004

#define mmPSOC_ETR_STS                                               0x2C4300C

#define mmPSOC_ETR_RRD                                               0x2C43010

#define mmPSOC_ETR_RRP                                               0x2C43014

#define mmPSOC_ETR_RWP                                               0x2C43018

#define mmPSOC_ETR_TRG                                               0x2C4301C

#define mmPSOC_ETR_CTL                                               0x2C43020

#define mmPSOC_ETR_RWD                                               0x2C43024

#define mmPSOC_ETR_MODE                                              0x2C43028

#define mmPSOC_ETR_LBUFLEVEL                                         0x2C4302C

#define mmPSOC_ETR_CBUFLEVEL                                         0x2C43030

#define mmPSOC_ETR_BUFWM                                             0x2C43034

#define mmPSOC_ETR_RRPHI                                             0x2C43038

#define mmPSOC_ETR_RWPHI                                             0x2C4303C

#define mmPSOC_ETR_AXICTL                                            0x2C43110

#define mmPSOC_ETR_DBALO                                             0x2C43118

#define mmPSOC_ETR_DBAHI                                             0x2C4311C

#define mmPSOC_ETR_FFSR                                              0x2C43300

#define mmPSOC_ETR_FFCR                                              0x2C43304

#define mmPSOC_ETR_PSCR                                              0x2C43308

#define mmPSOC_ETR_ITMISCOP0                                         0x2C43EE0

#define mmPSOC_ETR_ITTRFLIN                                          0x2C43EE8

#define mmPSOC_ETR_ITATBDATA0                                        0x2C43EEC

#define mmPSOC_ETR_ITATBCTR2                                         0x2C43EF0

#define mmPSOC_ETR_ITATBCTR1                                         0x2C43EF4

#define mmPSOC_ETR_ITATBCTR0                                         0x2C43EF8

#define mmPSOC_ETR_ITCTRL                                            0x2C43F00

#define mmPSOC_ETR_CLAIMSET                                          0x2C43FA0

#define mmPSOC_ETR_CLAIMCLR                                          0x2C43FA4

#define mmPSOC_ETR_LAR                                               0x2C43FB0

#define mmPSOC_ETR_LSR                                               0x2C43FB4

#define mmPSOC_ETR_AUTHSTATUS                                        0x2C43FB8

#define mmPSOC_ETR_DEVID                                             0x2C43FC8

#define mmPSOC_ETR_DEVTYPE                                           0x2C43FCC

#define mmPSOC_ETR_PERIPHID4                                         0x2C43FD0

#define mmPSOC_ETR_PERIPHID5                                         0x2C43FD4

#define mmPSOC_ETR_PERIPHID6                                         0x2C43FD8

#define mmPSOC_ETR_PERIPHID7                                         0x2C43FDC

#define mmPSOC_ETR_PERIPHID0                                         0x2C43FE0

#define mmPSOC_ETR_PERIPHID1                                         0x2C43FE4

#define mmPSOC_ETR_PERIPHID2                                         0x2C43FE8

Annotation

• Atlas domain: Driver Families / drivers/accel.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.