drivers/accel/habanalabs/include/goya/asic_reg/psoc_spi_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/goya/asic_reg/psoc_spi_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/goya/asic_reg/psoc_spi_regs.h- Extension
.h- Size
- 5238 bytes
- Lines
- 143
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_PSOC_SPI_REGS_H_
#define ASIC_REG_PSOC_SPI_REGS_H_
/*
*****************************************
* PSOC_SPI (Prototype: SPI)
*****************************************
*/
#define mmPSOC_SPI_CTRLR0 0xC43000
#define mmPSOC_SPI_CTRLR1 0xC43004
#define mmPSOC_SPI_SSIENR 0xC43008
#define mmPSOC_SPI_MWCR 0xC4300C
#define mmPSOC_SPI_SER 0xC43010
#define mmPSOC_SPI_BAUDR 0xC43014
#define mmPSOC_SPI_TXFTLR 0xC43018
#define mmPSOC_SPI_RXFTLR 0xC4301C
#define mmPSOC_SPI_TXFLR 0xC43020
#define mmPSOC_SPI_RXFLR 0xC43024
#define mmPSOC_SPI_SR 0xC43028
#define mmPSOC_SPI_IMR 0xC4302C
#define mmPSOC_SPI_ISR 0xC43030
#define mmPSOC_SPI_RISR 0xC43034
#define mmPSOC_SPI_TXOICR 0xC43038
#define mmPSOC_SPI_RXOICR 0xC4303C
#define mmPSOC_SPI_RXUICR 0xC43040
#define mmPSOC_SPI_MSTICR 0xC43044
#define mmPSOC_SPI_ICR 0xC43048
#define mmPSOC_SPI_IDR 0xC43058
#define mmPSOC_SPI_SSI_VERSION_ID 0xC4305C
#define mmPSOC_SPI_DR0 0xC43060
#define mmPSOC_SPI_DR1 0xC43064
#define mmPSOC_SPI_DR2 0xC43068
#define mmPSOC_SPI_DR3 0xC4306C
#define mmPSOC_SPI_DR4 0xC43070
#define mmPSOC_SPI_DR5 0xC43074
#define mmPSOC_SPI_DR6 0xC43078
#define mmPSOC_SPI_DR7 0xC4307C
#define mmPSOC_SPI_DR8 0xC43080
#define mmPSOC_SPI_DR9 0xC43084
#define mmPSOC_SPI_DR10 0xC43088
#define mmPSOC_SPI_DR11 0xC4308C
#define mmPSOC_SPI_DR12 0xC43090
#define mmPSOC_SPI_DR13 0xC43094
#define mmPSOC_SPI_DR14 0xC43098
#define mmPSOC_SPI_DR15 0xC4309C
#define mmPSOC_SPI_DR16 0xC430A0
#define mmPSOC_SPI_DR17 0xC430A4
#define mmPSOC_SPI_DR18 0xC430A8
#define mmPSOC_SPI_DR19 0xC430AC
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.