drivers/accel/habanalabs/include/goya/asic_reg/sram_y0_x0_rtr_regs.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/goya/asic_reg/sram_y0_x0_rtr_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/goya/asic_reg/sram_y0_x0_rtr_regs.h- Extension
.h- Size
- 2895 bytes
- Lines
- 83
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_
#define ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_
/*
*****************************************
* SRAM_Y0_X0_RTR (Prototype: IC_RTR)
*****************************************
*/
#define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_E_ARB 0x201100
#define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_W_ARB 0x201104
#define mmSRAM_Y0_X0_RTR_HBW_RD_RQ_L_ARB 0x201110
#define mmSRAM_Y0_X0_RTR_HBW_E_ARB_MAX 0x201120
#define mmSRAM_Y0_X0_RTR_HBW_W_ARB_MAX 0x201124
#define mmSRAM_Y0_X0_RTR_HBW_L_ARB_MAX 0x201130
#define mmSRAM_Y0_X0_RTR_HBW_DATA_E_ARB 0x201140
#define mmSRAM_Y0_X0_RTR_HBW_DATA_W_ARB 0x201144
#define mmSRAM_Y0_X0_RTR_HBW_DATA_L_ARB 0x201148
#define mmSRAM_Y0_X0_RTR_HBW_WR_RS_E_ARB 0x201160
#define mmSRAM_Y0_X0_RTR_HBW_WR_RS_W_ARB 0x201164
#define mmSRAM_Y0_X0_RTR_HBW_WR_RS_L_ARB 0x201168
#define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_E_ARB 0x201200
#define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_W_ARB 0x201204
#define mmSRAM_Y0_X0_RTR_LBW_RD_RQ_L_ARB 0x201210
#define mmSRAM_Y0_X0_RTR_LBW_E_ARB_MAX 0x201220
#define mmSRAM_Y0_X0_RTR_LBW_W_ARB_MAX 0x201224
#define mmSRAM_Y0_X0_RTR_LBW_L_ARB_MAX 0x201230
#define mmSRAM_Y0_X0_RTR_LBW_DATA_E_ARB 0x201240
#define mmSRAM_Y0_X0_RTR_LBW_DATA_W_ARB 0x201244
#define mmSRAM_Y0_X0_RTR_LBW_DATA_L_ARB 0x201248
#define mmSRAM_Y0_X0_RTR_LBW_WR_RS_E_ARB 0x201260
#define mmSRAM_Y0_X0_RTR_LBW_WR_RS_W_ARB 0x201264
#define mmSRAM_Y0_X0_RTR_LBW_WR_RS_L_ARB 0x201268
#define mmSRAM_Y0_X0_RTR_DBG_E_ARB 0x201300
#define mmSRAM_Y0_X0_RTR_DBG_W_ARB 0x201304
#define mmSRAM_Y0_X0_RTR_DBG_L_ARB 0x201310
#define mmSRAM_Y0_X0_RTR_DBG_E_ARB_MAX 0x201320
#define mmSRAM_Y0_X0_RTR_DBG_W_ARB_MAX 0x201324
#define mmSRAM_Y0_X0_RTR_DBG_L_ARB_MAX 0x201330
#endif /* ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ */
Annotation
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.