drivers/accel/habanalabs/include/goya/goya_coresight.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/goya/goya_coresight.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/goya/goya_coresight.h- Extension
.h- Size
- 4373 bytes
- Lines
- 200
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum goya_debug_stm_regs_indexenum goya_debug_etf_regs_indexenum goya_debug_funnel_regs_indexenum goya_debug_bmon_regs_indexenum goya_debug_spmu_regs_index
Annotated Snippet
#ifndef GOYA_CORESIGHT_H
#define GOYA_CORESIGHT_H
enum goya_debug_stm_regs_index {
GOYA_STM_FIRST = 0,
GOYA_STM_CPU = GOYA_STM_FIRST,
GOYA_STM_DMA_CH_0_CS,
GOYA_STM_DMA_CH_1_CS,
GOYA_STM_DMA_CH_2_CS,
GOYA_STM_DMA_CH_3_CS,
GOYA_STM_DMA_CH_4_CS,
GOYA_STM_DMA_MACRO_CS,
GOYA_STM_MME1_SBA,
GOYA_STM_MME3_SBB,
GOYA_STM_MME4_WACS2,
GOYA_STM_MME4_WACS,
GOYA_STM_MMU_CS,
GOYA_STM_PCIE,
GOYA_STM_PSOC,
GOYA_STM_TPC0_EML,
GOYA_STM_TPC1_EML,
GOYA_STM_TPC2_EML,
GOYA_STM_TPC3_EML,
GOYA_STM_TPC4_EML,
GOYA_STM_TPC5_EML,
GOYA_STM_TPC6_EML,
GOYA_STM_TPC7_EML,
GOYA_STM_LAST = GOYA_STM_TPC7_EML
};
enum goya_debug_etf_regs_index {
GOYA_ETF_FIRST = 0,
GOYA_ETF_CPU_0 = GOYA_ETF_FIRST,
GOYA_ETF_CPU_1,
GOYA_ETF_CPU_TRACE,
GOYA_ETF_DMA_CH_0_CS,
GOYA_ETF_DMA_CH_1_CS,
GOYA_ETF_DMA_CH_2_CS,
GOYA_ETF_DMA_CH_3_CS,
GOYA_ETF_DMA_CH_4_CS,
GOYA_ETF_DMA_MACRO_CS,
GOYA_ETF_MME1_SBA,
GOYA_ETF_MME3_SBB,
GOYA_ETF_MME4_WACS2,
GOYA_ETF_MME4_WACS,
GOYA_ETF_MMU_CS,
GOYA_ETF_PCIE,
GOYA_ETF_PSOC,
GOYA_ETF_TPC0_EML,
GOYA_ETF_TPC1_EML,
GOYA_ETF_TPC2_EML,
GOYA_ETF_TPC3_EML,
GOYA_ETF_TPC4_EML,
GOYA_ETF_TPC5_EML,
GOYA_ETF_TPC6_EML,
GOYA_ETF_TPC7_EML,
GOYA_ETF_LAST = GOYA_ETF_TPC7_EML
};
enum goya_debug_funnel_regs_index {
GOYA_FUNNEL_FIRST = 0,
GOYA_FUNNEL_CPU = GOYA_FUNNEL_FIRST,
GOYA_FUNNEL_DMA_CH_6_1,
GOYA_FUNNEL_DMA_MACRO_3_1,
GOYA_FUNNEL_MME0_RTR,
GOYA_FUNNEL_MME1_RTR,
GOYA_FUNNEL_MME2_RTR,
GOYA_FUNNEL_MME3_RTR,
GOYA_FUNNEL_MME4_RTR,
GOYA_FUNNEL_MME5_RTR,
GOYA_FUNNEL_PCIE,
GOYA_FUNNEL_PSOC,
GOYA_FUNNEL_TPC0_EML,
GOYA_FUNNEL_TPC1_EML,
GOYA_FUNNEL_TPC1_RTR,
GOYA_FUNNEL_TPC2_EML,
GOYA_FUNNEL_TPC2_RTR,
GOYA_FUNNEL_TPC3_EML,
GOYA_FUNNEL_TPC3_RTR,
GOYA_FUNNEL_TPC4_EML,
GOYA_FUNNEL_TPC4_RTR,
GOYA_FUNNEL_TPC5_EML,
GOYA_FUNNEL_TPC5_RTR,
GOYA_FUNNEL_TPC6_EML,
GOYA_FUNNEL_TPC6_RTR,
GOYA_FUNNEL_TPC7_EML,
GOYA_FUNNEL_LAST = GOYA_FUNNEL_TPC7_EML
};
enum goya_debug_bmon_regs_index {
Annotation
- Detected declarations: `enum goya_debug_stm_regs_index`, `enum goya_debug_etf_regs_index`, `enum goya_debug_funnel_regs_index`, `enum goya_debug_bmon_regs_index`, `enum goya_debug_spmu_regs_index`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.