drivers/accel/habanalabs/include/goya/goya_packets.h
Source file repositories/reference/linux-study-clean/drivers/accel/habanalabs/include/goya/goya_packets.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/accel/habanalabs/include/goya/goya_packets.h- Extension
.h- Size
- 2668 bytes
- Lines
- 131
- Domain
- Driver Families
- Bucket
- drivers/accel
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.h
Detected Declarations
struct goya_packetstruct packet_nopstruct packet_stopstruct packet_wreg32struct packet_wreg_bulkstruct packet_msg_longstruct packet_msg_shortstruct packet_msg_protstruct packet_fencestruct packet_lin_dmastruct packet_cp_dmaenum packet_id
Annotated Snippet
struct goya_packet {
__le64 header;
/* The rest of the packet data follows. Use the corresponding
* packet_XXX struct to deference the data, based on packet type
*/
u8 contents[];
};
struct packet_nop {
__le32 reserved;
__le32 ctl;
};
struct packet_stop {
__le32 reserved;
__le32 ctl;
};
#define GOYA_PKT_WREG32_CTL_REG_OFFSET_SHIFT 0
#define GOYA_PKT_WREG32_CTL_REG_OFFSET_MASK 0x0000FFFF
struct packet_wreg32 {
__le32 value;
__le32 ctl;
};
struct packet_wreg_bulk {
__le32 size64;
__le32 ctl;
__le64 values[]; /* data starts here */
};
struct packet_msg_long {
__le32 value;
__le32 ctl;
__le64 addr;
};
struct packet_msg_short {
__le32 value;
__le32 ctl;
};
struct packet_msg_prot {
__le32 value;
__le32 ctl;
__le64 addr;
};
struct packet_fence {
__le32 cfg;
__le32 ctl;
};
#define GOYA_PKT_LIN_DMA_CTL_WO_SHIFT 0
#define GOYA_PKT_LIN_DMA_CTL_WO_MASK 0x00000001
#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_SHIFT 1
#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_MASK 0x00000002
#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_SHIFT 2
#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_MASK 0x00000004
#define GOYA_PKT_LIN_DMA_CTL_MEMSET_SHIFT 6
#define GOYA_PKT_LIN_DMA_CTL_MEMSET_MASK 0x00000040
#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_SHIFT 20
#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_MASK 0x00700000
struct packet_lin_dma {
__le32 tsize;
__le32 ctl;
__le64 src_addr;
__le64 dst_addr;
};
struct packet_cp_dma {
__le32 tsize;
__le32 ctl;
__le64 src_addr;
};
#endif /* GOYA_PACKETS_H */
Annotation
- Immediate include surface: `linux/types.h`.
- Detected declarations: `struct goya_packet`, `struct packet_nop`, `struct packet_stop`, `struct packet_wreg32`, `struct packet_wreg_bulk`, `struct packet_msg_long`, `struct packet_msg_short`, `struct packet_msg_prot`, `struct packet_fence`, `struct packet_lin_dma`.
- Atlas domain: Driver Families / drivers/accel.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.