drivers/bus/stm32_rifsc.c
Source file repositories/reference/linux-study-clean/drivers/bus/stm32_rifsc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/bus/stm32_rifsc.c- Extension
.c- Size
- 19894 bytes
- Lines
- 825
- Domain
- Driver Families
- Bucket
- drivers/bus
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/bits.hlinux/bus/stm32_firewall.hlinux/debugfs.hlinux/device.hlinux/err.hlinux/init.hlinux/io.hlinux/kernel.hlinux/module.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/string.hlinux/types.h
Detected Declarations
struct rifsc_risup_debug_datastruct rifsc_rimu_debug_datastruct rifsc_subreg_debug_datastruct stm32_rifsc_resources_namesstruct rifsc_dbg_privatefunction stm32_rifsc_fill_rimu_dbg_entryfunction stm32_rifsc_fill_dev_dbg_entryfunction stm32_rifsc_fill_subreg_dbg_entryfunction stm32_rifsc_conf_dump_showfunction stm32_rifsc_register_debugfsfunction stm32_rifsc_is_semaphore_availablefunction stm32_rif_acquire_semaphorefunction stm32_rif_release_semaphorefunction stm32_rifsc_grant_accessfunction stm32_rifsc_release_accessfunction stm32_rifsc_probe
Annotated Snippet
struct rifsc_risup_debug_data {
char dev_name[15];
u8 dev_cid;
u8 dev_sem_cids;
u8 dev_id;
bool dev_cid_filt_en;
bool dev_sem_en;
bool dev_priv;
bool dev_sec;
};
struct rifsc_rimu_debug_data {
char m_name[11];
u8 m_cid;
bool cidsel;
bool m_sec;
bool m_priv;
};
struct rifsc_subreg_debug_data {
bool sr_sec;
bool sr_priv;
u8 sr_cid;
bool sr_rlock;
bool sr_enable;
u16 sr_start;
u16 sr_length;
};
struct stm32_rifsc_resources_names {
const char **device_names;
const char **initiator_names;
};
struct rifsc_dbg_private {
const struct stm32_rifsc_resources_names *res_names;
void __iomem *mmio;
unsigned int nb_risup;
unsigned int nb_rimu;
unsigned int nb_risal;
};
static const struct stm32_rifsc_resources_names rifsc_mp21_res_names = {
.device_names = stm32mp21_rifsc_risup_names,
.initiator_names = stm32mp21_rifsc_rimu_names,
};
static const struct stm32_rifsc_resources_names rifsc_mp25_res_names = {
.device_names = stm32mp25_rifsc_risup_names,
.initiator_names = stm32mp25_rifsc_rimu_names,
};
static void stm32_rifsc_fill_rimu_dbg_entry(struct rifsc_dbg_private *rifsc,
struct rifsc_rimu_debug_data *dbg_entry, int i)
{
const struct stm32_rifsc_resources_names *dbg_names = rifsc->res_names;
u32 rimc_attr = readl_relaxed(rifsc->mmio + RIFSC_RIMC_ATTR0 + 0x4 * i);
strscpy(dbg_entry->m_name, dbg_names->initiator_names[i]);
dbg_entry->m_cid = FIELD_GET(RIFSC_RIMC_MCID_MASK, rimc_attr);
dbg_entry->cidsel = rimc_attr & RIFSC_RIMC_CIDSEL;
dbg_entry->m_sec = rimc_attr & RIFSC_RIMC_MSEC;
dbg_entry->m_priv = rimc_attr & RIFSC_RIMC_MPRIV;
}
static void stm32_rifsc_fill_dev_dbg_entry(struct rifsc_dbg_private *rifsc,
struct rifsc_risup_debug_data *dbg_entry, int i)
{
const struct stm32_rifsc_resources_names *dbg_names = rifsc->res_names;
u32 cid_cfgr, sec_cfgr, priv_cfgr;
u8 reg_id = i / IDS_PER_RISC_SEC_PRIV_REGS;
u8 reg_offset = i % IDS_PER_RISC_SEC_PRIV_REGS;
cid_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * i);
sec_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id);
priv_cfgr = readl_relaxed(rifsc->mmio + RIFSC_RISC_PRIVCFGR0 + 0x4 * reg_id);
strscpy(dbg_entry->dev_name, dbg_names->device_names[i]);
dbg_entry->dev_id = i;
dbg_entry->dev_cid_filt_en = cid_cfgr & CIDCFGR_CFEN;
dbg_entry->dev_sem_en = cid_cfgr & CIDCFGR_SEMEN;
dbg_entry->dev_cid = FIELD_GET(RIFSC_RISC_SCID_MASK, cid_cfgr);
dbg_entry->dev_sem_cids = FIELD_GET(RIFSC_RISC_SEMWL_MASK, cid_cfgr);
dbg_entry->dev_sec = sec_cfgr & BIT(reg_offset) ? true : false;
dbg_entry->dev_priv = priv_cfgr & BIT(reg_offset) ? true : false;
}
static void stm32_rifsc_fill_subreg_dbg_entry(struct rifsc_dbg_private *rifsc,
struct rifsc_subreg_debug_data *dbg_entry, int i,
int j)
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/bits.h`, `linux/bus/stm32_firewall.h`, `linux/debugfs.h`, `linux/device.h`, `linux/err.h`, `linux/init.h`, `linux/io.h`.
- Detected declarations: `struct rifsc_risup_debug_data`, `struct rifsc_rimu_debug_data`, `struct rifsc_subreg_debug_data`, `struct stm32_rifsc_resources_names`, `struct rifsc_dbg_private`, `function stm32_rifsc_fill_rimu_dbg_entry`, `function stm32_rifsc_fill_dev_dbg_entry`, `function stm32_rifsc_fill_subreg_dbg_entry`, `function stm32_rifsc_conf_dump_show`, `function stm32_rifsc_register_debugfs`.
- Atlas domain: Driver Families / drivers/bus.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.