drivers/cdx/Kconfig

Source file repositories/reference/linux-study-clean/drivers/cdx/Kconfig

File Facts

System: Linux kernel
Corpus path: drivers/cdx/Kconfig
Extension: [no extension]
Size: 589 bytes
Lines: 20
Domain: Driver Families
Bucket: drivers/cdx
Inferred role: Driver Families: build/configuration rule
Status: atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
#
# CDX bus configuration
#
# Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
#

config CDX_BUS
	bool "CDX Bus driver"
	depends on OF && ARM64 || COMPILE_TEST
	help
	  Driver to enable Composable DMA Transfer(CDX) Bus. CDX bus
	  exposes Fabric devices which uses composable DMA IP to the
	  APU. CDX bus provides a mechanism for scanning and probing
	  of CDX devices. CDX devices are memory mapped on system bus
	  for embedded CPUs. CDX bus uses CDX controller and firmware
	  to scan these CDX devices.

source "drivers/cdx/controller/Kconfig"

Annotation

Atlas domain: Driver Families / drivers/cdx.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.