drivers/char/tpm/tpm_tis_synquacer.c

Source file repositories/reference/linux-study-clean/drivers/char/tpm/tpm_tis_synquacer.c

File Facts

System
Linux kernel
Corpus path
drivers/char/tpm/tpm_tis_synquacer.c
Extension
.c
Size
4275 bytes
Lines
168
Domain
Driver Families
Bucket
drivers/char
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct tpm_tis_synquacer_info {
	struct resource res;
	int irq;
};

struct tpm_tis_synquacer_phy {
	struct tpm_tis_data priv;
	void __iomem *iobase;
};

static inline struct tpm_tis_synquacer_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *data)
{
	return container_of(data, struct tpm_tis_synquacer_phy, priv);
}

static int tpm_tis_synquacer_read_bytes(struct tpm_tis_data *data, u32 addr,
					u16 len, u8 *result,
					enum tpm_tis_io_mode io_mode)
{
	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
	switch (io_mode) {
	case TPM_TIS_PHYS_8:
		while (len--)
			*result++ = ioread8(phy->iobase + addr);
		break;
	case TPM_TIS_PHYS_16:
		result[1] = ioread8(phy->iobase + addr + 1);
		result[0] = ioread8(phy->iobase + addr);
		break;
	case TPM_TIS_PHYS_32:
		result[3] = ioread8(phy->iobase + addr + 3);
		result[2] = ioread8(phy->iobase + addr + 2);
		result[1] = ioread8(phy->iobase + addr + 1);
		result[0] = ioread8(phy->iobase + addr);
		break;
	}

	return 0;
}

static int tpm_tis_synquacer_write_bytes(struct tpm_tis_data *data, u32 addr,
					 u16 len, const u8 *value,
					 enum tpm_tis_io_mode io_mode)
{
	struct tpm_tis_synquacer_phy *phy = to_tpm_tis_tcg_phy(data);
	switch (io_mode) {
	case TPM_TIS_PHYS_8:
		while (len--)
			iowrite8(*value++, phy->iobase + addr);
		break;
	case TPM_TIS_PHYS_16:
		return -EINVAL;
	case TPM_TIS_PHYS_32:
		/*
		 * Due to the limitation of SPI controller on SynQuacer,
		 * 16/32 bits access must be done in byte-wise and descending order.
		 */
		iowrite8(value[3], phy->iobase + addr + 3);
		iowrite8(value[2], phy->iobase + addr + 2);
		iowrite8(value[1], phy->iobase + addr + 1);
		iowrite8(value[0], phy->iobase + addr);
		break;
	}

	return 0;
}

static const struct tpm_tis_phy_ops tpm_tcg_bw = {
	.read_bytes	= tpm_tis_synquacer_read_bytes,
	.write_bytes	= tpm_tis_synquacer_write_bytes,
};

static int tpm_tis_synquacer_init(struct device *dev,
				  struct tpm_tis_synquacer_info *tpm_info)
{
	struct tpm_tis_synquacer_phy *phy;

	phy = devm_kzalloc(dev, sizeof(struct tpm_tis_synquacer_phy), GFP_KERNEL);
	if (phy == NULL)
		return -ENOMEM;

	phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
	if (IS_ERR(phy->iobase))
		return PTR_ERR(phy->iobase);

	return tpm_tis_core_init(dev, &phy->priv, tpm_info->irq, &tpm_tcg_bw,
				 ACPI_HANDLE(dev));
}

static SIMPLE_DEV_PM_OPS(tpm_tis_synquacer_pm, tpm_pm_suspend, tpm_tis_resume);

Annotation

Implementation Notes