drivers/clk/actions/owl-pll.c

Source file repositories/reference/linux-study-clean/drivers/clk/actions/owl-pll.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/actions/owl-pll.c
Extension
.c
Size
4314 bytes
Lines
202
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (clkt->rate == rate) {
			table = clkt;
			break;
		} else if (clkt->rate < rate)
			table = clkt;
	}

	return table;
}

static int owl_pll_determine_rate(struct clk_hw *hw,
				  struct clk_rate_request *req)
{
	struct owl_pll *pll = hw_to_owl_pll(hw);
	struct owl_pll_hw *pll_hw = &pll->pll_hw;
	const struct clk_pll_table *clkt;
	u32 mul;

	if (pll_hw->table) {
		clkt = _get_pll_table(pll_hw->table, req->rate);
		req->rate = clkt->rate;

		return 0;
	}

	/* fixed frequency */
	if (pll_hw->width == 0) {
		req->rate = pll_hw->bfreq;

		return 0;
	}

	mul = owl_pll_calculate_mul(pll_hw, req->rate);

	req->rate = pll_hw->bfreq * mul;

	return 0;
}

static unsigned long owl_pll_recalc_rate(struct clk_hw *hw,
		unsigned long parent_rate)
{
	struct owl_pll *pll = hw_to_owl_pll(hw);
	struct owl_pll_hw *pll_hw = &pll->pll_hw;
	const struct owl_clk_common *common = &pll->common;
	u32 val;

	if (pll_hw->table) {
		regmap_read(common->regmap, pll_hw->reg, &val);

		val = val >> pll_hw->shift;
		val &= mul_mask(pll_hw);

		return _get_table_rate(pll_hw->table, val);
	}

	/* fixed frequency */
	if (pll_hw->width == 0)
		return pll_hw->bfreq;

	regmap_read(common->regmap, pll_hw->reg, &val);

	val = val >> pll_hw->shift;
	val &= mul_mask(pll_hw);

	return pll_hw->bfreq * val;
}

static int owl_pll_is_enabled(struct clk_hw *hw)
{
	struct owl_pll *pll = hw_to_owl_pll(hw);
	struct owl_pll_hw *pll_hw = &pll->pll_hw;
	const struct owl_clk_common *common = &pll->common;
	u32 reg;

	regmap_read(common->regmap, pll_hw->reg, &reg);

	return !!(reg & BIT(pll_hw->bit_idx));
}

static void owl_pll_set(const struct owl_clk_common *common,
		       const struct owl_pll_hw *pll_hw, bool enable)
{
	u32 reg;

	regmap_read(common->regmap, pll_hw->reg, &reg);

	if (enable)
		reg |= BIT(pll_hw->bit_idx);
	else

Annotation

Implementation Notes