drivers/clk/at91/pmc.h

Source file repositories/reference/linux-study-clean/drivers/clk/at91/pmc.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/at91/pmc.h
Extension
.h
Size
8934 bytes
Lines
297
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct pmc_data {
	unsigned int ncore;
	struct clk_hw **chws;
	unsigned int nsystem;
	struct clk_hw **shws;
	unsigned int nperiph;
	struct clk_hw **phws;
	unsigned int ngck;
	struct clk_hw **ghws;
	unsigned int npck;
	struct clk_hw **pchws;

	struct clk_hw *hwtable[];
};

struct clk_range {
	unsigned long min;
	unsigned long max;
};

#define CLK_RANGE(MIN, MAX) {.min = MIN, .max = MAX,}

struct clk_master_layout {
	u32 offset;
	u32 mask;
	u8 pres_shift;
};

extern const struct clk_master_layout at91rm9200_master_layout;
extern const struct clk_master_layout at91sam9x5_master_layout;

struct clk_master_characteristics {
	struct clk_range output;
	u32 divisors[5];
	u8 have_div3_pres;
};

struct clk_pll_layout {
	u32 pllr_mask;
	u32 mul_mask;
	u32 frac_mask;
	u32 div_mask;
	u32 endiv_mask;
	u8 mul_shift;
	u8 frac_shift;
	u8 div_shift;
	u8 endiv_shift;
	u8 div2;
};

extern const struct clk_pll_layout at91rm9200_pll_layout;
extern const struct clk_pll_layout at91sam9g45_pll_layout;
extern const struct clk_pll_layout at91sam9g20_pllb_layout;
extern const struct clk_pll_layout sama5d3_pll_layout;

struct clk_pll_characteristics {
	struct clk_range input;
	int num_output;
	const struct clk_range *output;
	const struct clk_range *core_output;
	u16 *icpll;
	u8 *out;
	u8 upll : 1;
	u32 acr;
};

struct clk_programmable_layout {
	u8 pres_mask;
	u8 pres_shift;
	u8 css_mask;
	u8 have_slck_mck;
	u8 is_pres_direct;
};

extern const struct clk_programmable_layout at91rm9200_programmable_layout;
extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
extern const struct clk_programmable_layout at91sam9x5_programmable_layout;

struct clk_pcr_layout {
	u32 offset;
	u32 cmd;
	u32 div_mask;
	u32 gckcss_mask;
	u32 pid_mask;
};

/**
 * struct at91_clk_pms - Power management state for AT91 clock
 * @rate: clock rate
 * @parent_rate: clock parent rate

Annotation

Implementation Notes