drivers/clk/at91/sam9x7.c
Source file repositories/reference/linux-study-clean/drivers/clk/at91/sam9x7.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/at91/sam9x7.c- Extension
.c- Size
- 21636 bytes
- Lines
- 953
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clk-provider.hlinux/mfd/syscon.hlinux/slab.hdt-bindings/clock/at91.hpmc.h
Detected Declarations
enum pll_idsenum pll_typefunction sam9x7_pmc_setup
Annotated Snippet
switch (sam9x7_plls[i][j].t) {
case PLL_TYPE_FRAC:
if (!strcmp(sam9x7_plls[i][j].p, "mainck"))
parent_hw = sam9x7_pmc->chws[PMC_MAIN];
else if (!strcmp(sam9x7_plls[i][j].p, "main_osc"))
parent_hw = main_osc_hw;
else
parent_hw = __clk_get_hw(of_clk_get_by_name
(np, sam9x7_plls[i][j].p));
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
sam9x7_plls[i][j].p,
parent_hw, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f);
break;
case PLL_TYPE_DIV:
hw = sam9x60_clk_register_div_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
sam9x7_plls[i][j].p, NULL, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f, 0);
break;
default:
continue;
}
if (IS_ERR(hw))
goto err_free;
if (sam9x7_plls[i][j].eid)
sam9x7_pmc->chws[sam9x7_plls[i][j].eid] = hw;
}
}
parent_names[0] = md_slck_name;
parent_names[1] = "mainck";
parent_names[2] = "plla_divpmcck";
parent_names[3] = "upll_divpmcck";
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
parent_names, NULL, &sam9x7_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
"masterck_pres", NULL, &sam9x7_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
goto err_free;
sam9x7_pmc->chws[PMC_MCK] = hw;
parent_names[0] = "plla_divpmcck";
parent_names[1] = "upll_divpmcck";
parent_names[2] = "main_osc";
hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
if (IS_ERR(hw))
goto err_free;
parent_names[0] = md_slck_name;
parent_names[1] = td_slck_name;
parent_names[2] = "mainck";
parent_names[3] = "masterck_div";
parent_names[4] = "plla_divpmcck";
parent_names[5] = "upll_divpmcck";
parent_names[6] = "audiopll_divpmcck";
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
parent_names, NULL, 7, i,
&sam9x7_programmable_layout,
NULL);
if (IS_ERR(hw))
goto err_free;
sam9x7_pmc->pchws[i] = hw;
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clk-provider.h`, `linux/mfd/syscon.h`, `linux/slab.h`, `dt-bindings/clock/at91.h`, `pmc.h`.
- Detected declarations: `enum pll_ids`, `enum pll_type`, `function sam9x7_pmc_setup`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.