drivers/clk/at91/sama7d65.c

Source file repositories/reference/linux-study-clean/drivers/clk/at91/sama7d65.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/at91/sama7d65.c
Extension
.c
Size
37931 bytes
Lines
1380
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (sama7d65_plls[i][j].t) {
			case PLL_TYPE_FRAC:
				switch (sama7d65_plls[i][j].p) {
				case SAMA7D65_PLL_PARENT_MAINCK:
					parent_hw = sama7d65_pmc->chws[PMC_MAIN];
					break;
				case SAMA7D65_PLL_PARENT_MAIN_XTAL:
					parent_hw = main_xtal_hw;
					break;
				default:
					/* Should not happen. */
					parent_hw = NULL;
					break;
				}

				hw = sam9x60_clk_register_frac_pll(regmap,
					&pmc_pll_lock, sama7d65_plls[i][j].n,
					NULL, parent_hw, i,
					sama7d65_plls[i][j].c,
					sama7d65_plls[i][j].l,
					sama7d65_plls[i][j].f);
				break;

			case PLL_TYPE_DIV:
				hw = sam9x60_clk_register_div_pll(regmap,
					&pmc_pll_lock, sama7d65_plls[i][j].n,
					NULL, sama7d65_plls[i][0].hw, i,
					sama7d65_plls[i][j].c,
					sama7d65_plls[i][j].l,
					sama7d65_plls[i][j].f,
					sama7d65_plls[i][j].safe_div);
				break;

			default:
				continue;
			}

			if (IS_ERR(hw))
				goto err_free;

			sama7d65_plls[i][j].hw = hw;
			if (sama7d65_plls[i][j].eid)
				sama7d65_pmc->chws[sama7d65_plls[i][j].eid] = hw;
		}
	}

	hw = at91_clk_register_master_div(regmap, "mck0", NULL,
					  sama7d65_plls[PLL_ID_CPU][1].hw,
					  &mck0_layout, &mck0_characteristics,
					  &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
	if (IS_ERR(hw))
		goto err_free;

	sama7d65_pmc->chws[PMC_MCK] = hw;
	sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;

	parent_hws[0] = md_slck_hw;
	parent_hws[1] = td_slck_hw;
	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
	for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
		u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
		struct clk_hw *tmp_parent_hws[8];
		u32 *mux_table;

		mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
					  GFP_KERNEL);
		if (!mux_table)
			goto err_free;

		alloc_mem[alloc_mem_size++] = mux_table;

		PMC_INIT_TABLE(mux_table, 3);
		PMC_FILL_TABLE(&mux_table[3], sama7d65_mckx[i].ep_mux_table,
			       sama7d65_mckx[i].ep_count);
		for (j = 0; j < sama7d65_mckx[i].ep_count; j++) {
			u8 pll_id = sama7d65_mckx[i].ep[j].pll_id;
			u8 pll_compid = sama7d65_mckx[i].ep[j].pll_compid;

			tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
		}
		PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
			       sama7d65_mckx[i].ep_count);

		hw = at91_clk_sama7g5_register_master(regmap, sama7d65_mckx[i].n,
						      num_parents, NULL, parent_hws,
						      mux_table, &pmc_mckX_lock,
						      sama7d65_mckx[i].id,
						      sama7d65_mckx[i].c,
						      sama7d65_mckx[i].ep_chg_id);

Annotation

Implementation Notes