drivers/clk/clk-cdce706.c
Source file repositories/reference/linux-study-clean/drivers/clk/clk-cdce706.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/clk-cdce706.c- Extension
.c- Size
- 18065 bytes
- Lines
- 701
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/clk-provider.hlinux/delay.hlinux/i2c.hlinux/interrupt.hlinux/mod_devicetable.hlinux/module.hlinux/of.hlinux/rational.hlinux/regmap.hlinux/slab.h
Detected Declarations
struct cdce706_hw_datastruct cdce706_dev_datafunction cdce706_reg_readfunction cdce706_reg_writefunction cdce706_reg_updatefunction cdce706_clkin_set_parentfunction cdce706_clkin_get_parentfunction cdce706_pll_recalc_ratefunction cdce706_pll_determine_ratefunction cdce706_pll_set_ratefunction cdce706_divider_set_parentfunction cdce706_divider_get_parentfunction cdce706_divider_recalc_ratefunction cdce706_divider_determine_ratefunction cdce706_divider_set_ratefunction cdce706_clkout_preparefunction cdce706_clkout_unpreparefunction cdce706_clkout_set_parentfunction cdce706_clkout_get_parentfunction cdce706_clkout_recalc_ratefunction cdce706_clkout_determine_ratefunction cdce706_clkout_set_ratefunction cdce706_register_hwfunction cdce706_register_clkinfunction cdce706_register_pllsfunction cdce706_register_dividersfunction cdce706_register_clkoutsfunction of_clk_cdce_getfunction cdce706_probe
Annotated Snippet
struct cdce706_hw_data {
struct cdce706_dev_data *dev_data;
unsigned idx;
unsigned parent;
struct clk_hw hw;
unsigned div;
unsigned mul;
unsigned mux;
};
struct cdce706_dev_data {
struct i2c_client *client;
struct regmap *regmap;
struct clk *clkin_clk[2];
const char *clkin_name[2];
struct cdce706_hw_data clkin[1];
struct cdce706_hw_data pll[3];
struct cdce706_hw_data divider[6];
struct cdce706_hw_data clkout[6];
};
static const char * const cdce706_source_name[] = {
"clk_in0", "clk_in1",
};
static const char * const cdce706_clkin_name[] = {
"clk_in",
};
static const char * const cdce706_pll_name[] = {
"pll1", "pll2", "pll3",
};
static const char * const cdce706_divider_parent_name[] = {
"clk_in", "pll1", "pll2", "pll2", "pll3",
};
static const char *cdce706_divider_name[] = {
"p0", "p1", "p2", "p3", "p4", "p5",
};
static const char * const cdce706_clkout_name[] = {
"clk_out0", "clk_out1", "clk_out2", "clk_out3", "clk_out4", "clk_out5",
};
static int cdce706_reg_read(struct cdce706_dev_data *dev_data, unsigned reg,
unsigned *val)
{
int rc = regmap_read(dev_data->regmap, reg | 0x80, val);
if (rc < 0)
dev_err(&dev_data->client->dev, "error reading reg %u", reg);
return rc;
}
static int cdce706_reg_write(struct cdce706_dev_data *dev_data, unsigned reg,
unsigned val)
{
int rc = regmap_write(dev_data->regmap, reg | 0x80, val);
if (rc < 0)
dev_err(&dev_data->client->dev, "error writing reg %u", reg);
return rc;
}
static int cdce706_reg_update(struct cdce706_dev_data *dev_data, unsigned reg,
unsigned mask, unsigned val)
{
int rc = regmap_update_bits(dev_data->regmap, reg | 0x80, mask, val);
if (rc < 0)
dev_err(&dev_data->client->dev, "error updating reg %u", reg);
return rc;
}
static int cdce706_clkin_set_parent(struct clk_hw *hw, u8 index)
{
struct cdce706_hw_data *hwd = to_hw_data(hw);
hwd->parent = index;
return 0;
}
static u8 cdce706_clkin_get_parent(struct clk_hw *hw)
{
struct cdce706_hw_data *hwd = to_hw_data(hw);
return hwd->parent;
}
Annotation
- Immediate include surface: `linux/clk.h`, `linux/clk-provider.h`, `linux/delay.h`, `linux/i2c.h`, `linux/interrupt.h`, `linux/mod_devicetable.h`, `linux/module.h`, `linux/of.h`.
- Detected declarations: `struct cdce706_hw_data`, `struct cdce706_dev_data`, `function cdce706_reg_read`, `function cdce706_reg_write`, `function cdce706_reg_update`, `function cdce706_clkin_set_parent`, `function cdce706_clkin_get_parent`, `function cdce706_pll_recalc_rate`, `function cdce706_pll_determine_rate`, `function cdce706_pll_set_rate`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.