drivers/clk/clk-npcm8xx.c
Source file repositories/reference/linux-study-clean/drivers/clk/clk-npcm8xx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/clk-npcm8xx.c- Extension
.c- Size
- 14309 bytes
- Lines
- 431
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/auxiliary_bus.hlinux/bitfield.hlinux/clk-provider.hlinux/err.hlinux/io.hlinux/kernel.hlinux/module.hlinux/platform_device.hlinux/slab.hdt-bindings/clock/nuvoton,npcm845-clk.hsoc/nuvoton/clock-npcm8xx.h
Detected Declarations
struct npcm8xx_clk_pllstruct npcm8xx_clk_pll_datastruct npcm8xx_clk_div_datastruct npcm8xx_clk_mux_datafunction npcm8xx_clk_pll_recalc_ratefunction npcm8xx_clk_register_pllfunction npcm8xx_clk_probe
Annotated Snippet
struct npcm8xx_clk_pll {
void __iomem *pllcon;
unsigned int id;
const char *name;
unsigned long flags;
struct clk_hw hw;
};
#define to_npcm8xx_clk_pll(_hw) container_of(_hw, struct npcm8xx_clk_pll, hw)
struct npcm8xx_clk_pll_data {
const char *name;
struct clk_parent_data parent;
unsigned int reg;
unsigned long flags;
struct clk_hw hw;
};
struct npcm8xx_clk_div_data {
u32 reg;
u8 shift;
u8 width;
const char *name;
const struct clk_hw *parent_hw;
unsigned long clk_divider_flags;
unsigned long flags;
int onecell_idx;
struct clk_hw hw;
};
struct npcm8xx_clk_mux_data {
u8 shift;
u32 mask;
const u32 *table;
const char *name;
const struct clk_parent_data *parent_data;
u8 num_parents;
unsigned long flags;
struct clk_hw hw;
};
static struct clk_hw hw_pll1_div2, hw_pll2_div2, hw_gfx_div2, hw_pre_clk;
static struct npcm8xx_clk_pll_data npcm8xx_pll_clks[] = {
{ "pll0", { .index = 0 }, NPCM8XX_PLLCON0, 0 },
{ "pll1", { .index = 0 }, NPCM8XX_PLLCON1, 0 },
{ "pll2", { .index = 0 }, NPCM8XX_PLLCON2, 0 },
{ "pll_gfx", { .index = 0 }, NPCM8XX_PLLCONG, 0 },
};
static const u32 cpuck_mux_table[] = { 0, 1, 2, 7 };
static const struct clk_parent_data cpuck_mux_parents[] = {
{ .hw = &npcm8xx_pll_clks[0].hw },
{ .hw = &npcm8xx_pll_clks[1].hw },
{ .index = 0 },
{ .hw = &npcm8xx_pll_clks[2].hw }
};
static const u32 pixcksel_mux_table[] = { 0, 2 };
static const struct clk_parent_data pixcksel_mux_parents[] = {
{ .hw = &npcm8xx_pll_clks[3].hw },
{ .index = 0 }
};
static const u32 default_mux_table[] = { 0, 1, 2, 3 };
static const struct clk_parent_data default_mux_parents[] = {
{ .hw = &npcm8xx_pll_clks[0].hw },
{ .hw = &npcm8xx_pll_clks[1].hw },
{ .index = 0 },
{ .hw = &hw_pll2_div2 }
};
static const u32 sucksel_mux_table[] = { 2, 3 };
static const struct clk_parent_data sucksel_mux_parents[] = {
{ .index = 0 },
{ .hw = &hw_pll2_div2 }
};
static const u32 mccksel_mux_table[] = { 0, 2 };
static const struct clk_parent_data mccksel_mux_parents[] = {
{ .hw = &hw_pll1_div2 },
{ .index = 0 }
};
static const u32 clkoutsel_mux_table[] = { 0, 1, 2, 3, 4 };
static const struct clk_parent_data clkoutsel_mux_parents[] = {
{ .hw = &npcm8xx_pll_clks[0].hw },
{ .hw = &npcm8xx_pll_clks[1].hw },
{ .index = 0 },
{ .hw = &hw_gfx_div2 },
{ .hw = &hw_pll2_div2 }
Annotation
- Immediate include surface: `linux/auxiliary_bus.h`, `linux/bitfield.h`, `linux/clk-provider.h`, `linux/err.h`, `linux/io.h`, `linux/kernel.h`, `linux/module.h`, `linux/platform_device.h`.
- Detected declarations: `struct npcm8xx_clk_pll`, `struct npcm8xx_clk_pll_data`, `struct npcm8xx_clk_div_data`, `struct npcm8xx_clk_mux_data`, `function npcm8xx_clk_pll_recalc_rate`, `function npcm8xx_clk_register_pll`, `function npcm8xx_clk_probe`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.