drivers/clk/clk-qoriq.c

Source file repositories/reference/linux-study-clean/drivers/clk/clk-qoriq.c

File Facts

System: Linux kernel
Corpus path: drivers/clk/clk-qoriq.c
Extension: .c
Size: 38493 bytes
Lines: 1619
Domain: Driver Families
Bucket: drivers/clk
Inferred role: Driver Families: exported/initcall integration point
Status: integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
Allocates kernel memory; connect allocation flags and lifetime to context constraints.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

dt-bindings/clock/fsl,qoriq-clockgen.h
linux/cleanup.h
linux/clk.h
linux/clk-provider.h
linux/clkdev.h
linux/fsl/guts.h
linux/io.h
linux/kernel.h
linux/module.h
linux/of_address.h
linux/of.h
linux/platform_device.h
linux/slab.h
asm/mpc85xx.h

Detected Declarations

struct clockgen_pll_div
struct clockgen_pll
struct clockgen_sourceinfo
struct clockgen_muxinfo
struct clockgen
struct clockgen_chipinfo
struct clockgen
struct mux_hwclock
function cg_out
function cg_in
function p2041_init_periph
function p4080_init_periph
function p5020_init_periph
function p5040_init_periph
function t1023_init_periph
function t1040_init_periph
function t2080_init_periph
function t4240_init_periph
function mux_set_parent
function mux_get_parent
function __printf
function create_one_cmux
function create_one_hwaccel
function create_muxes
function legacy_init_clockgen
function core_mux_init
function create_sysclk
function create_coreclk
function sysclk_init
function create_one_pll
function create_plls
function legacy_pll_init
function pltfrm_pll_init
function core_pll_init
function has_erratum_a4510
function has_erratum_a4510
function _clockgen_init
function of_device_is_compatible
function clockgen_init
function clockgen_cpufreq_init
module init clockgen_cpufreq_init

Annotated Snippet

device_initcall(clockgen_cpufreq_init);

CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_b4420, "fsl,b4420-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_b4860, "fsl,b4860-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1028a, "fsl,ls1028a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1046a, "fsl,ls1046a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1088a, "fsl,ls1088a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_lx2160a, "fsl,lx2160a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p2041, "fsl,p2041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p3041, "fsl,p3041-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p4080, "fsl,p4080-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p5020, "fsl,p5020-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_p5040, "fsl,p5040-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t1023, "fsl,t1023-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t1040, "fsl,t1040-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t2080, "fsl,t2080-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_t4240, "fsl,t4240-clockgen", clockgen_init);

/* Legacy nodes */
CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
CLK_OF_DECLARE(qoriq_sysclk_2, "fsl,qoriq-sysclk-2.0", sysclk_init);
CLK_OF_DECLARE(qoriq_core_pll_1, "fsl,qoriq-core-pll-1.0", core_pll_init);
CLK_OF_DECLARE(qoriq_core_pll_2, "fsl,qoriq-core-pll-2.0", core_pll_init);
CLK_OF_DECLARE(qoriq_core_mux_1, "fsl,qoriq-core-mux-1.0", core_mux_init);
CLK_OF_DECLARE(qoriq_core_mux_2, "fsl,qoriq-core-mux-2.0", core_mux_init);
CLK_OF_DECLARE(qoriq_pltfrm_pll_1, "fsl,qoriq-platform-pll-1.0", pltfrm_pll_init);
CLK_OF_DECLARE(qoriq_pltfrm_pll_2, "fsl,qoriq-platform-pll-2.0", pltfrm_pll_init);

Annotation

Immediate include surface: `dt-bindings/clock/fsl,qoriq-clockgen.h`, `linux/cleanup.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/clkdev.h`, `linux/fsl/guts.h`, `linux/io.h`, `linux/kernel.h`.
Detected declarations: `struct clockgen_pll_div`, `struct clockgen_pll`, `struct clockgen_sourceinfo`, `struct clockgen_muxinfo`, `struct clockgen`, `struct clockgen_chipinfo`, `struct clockgen`, `struct mux_hwclock`, `function cg_out`, `function cg_in`.
Atlas domain: Driver Families / drivers/clk.
Implementation status: integration implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.