drivers/clk/clk-versaclock7.c
Source file repositories/reference/linux-study-clean/drivers/clk/clk-versaclock7.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/clk-versaclock7.c- Extension
.c- Size
- 34834 bytes
- Lines
- 1316
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/clk-provider.hlinux/i2c.hlinux/math64.hlinux/module.hlinux/of.hlinux/property.hlinux/regmap.hlinux/swab.h
Detected Declarations
struct vc7_driver_datastruct vc7_chip_infostruct vc7_apll_datastruct vc7_fod_datastruct vc7_iod_datastruct vc7_out_datastruct vc7_driver_datastruct vc7_bank_src_mapenum vc7_modelenum vc7_bank_src_typefunction vc7_map_index_to_outputfunction vc7_64_mul_64_to_128function vc7_128_div_64_to_64function vc7_get_bank_clkfunction vc7_read_apllfunction vc7_read_fodfunction vc7_write_fodfunction vc7_read_iodfunction vc7_write_iodfunction vc7_read_outputfunction vc7_write_outputfunction vc7_get_apll_ratefunction vc7_calc_iod_dividerfunction vc7_calc_fod_1st_stagefunction vc7_calc_fod_1st_stage_ratefunction vc7_calc_fod_2nd_stage_ratefunction vc7_calc_fod_dividerfunction vc7_fod_recalc_ratefunction vc7_fod_determine_ratefunction vc7_fod_set_ratefunction vc7_iod_recalc_ratefunction vc7_iod_determine_ratefunction vc7_iod_set_ratefunction vc7_clk_out_preparefunction vc7_clk_out_unpreparefunction vc7_clk_out_is_enabledfunction vc7_probefunction vc7_removefunction vc7_volatile_reg
Annotated Snippet
struct vc7_chip_info {
const enum vc7_model model;
const unsigned int banks[VC7_NUM_BANKS];
const unsigned int num_banks;
const unsigned int outputs[VC7_NUM_OUT];
const unsigned int num_outputs;
};
/*
* Changing the APLL frequency is currently not supported.
* The APLL will consist of an opaque block between the XO and FOD/IODs and
* its frequency will be computed based on the current state of the device.
*/
struct vc7_apll_data {
struct clk *clk;
struct vc7_driver_data *vc7;
u8 xo_ib_h_div;
u8 en_doubler;
u16 apll_fb_div_int;
u32 apll_fb_div_frac;
};
struct vc7_fod_data {
struct clk_hw hw;
struct vc7_driver_data *vc7;
unsigned int num;
u32 fod_1st_int;
u32 fod_2nd_int;
u64 fod_frac;
};
struct vc7_iod_data {
struct clk_hw hw;
struct vc7_driver_data *vc7;
unsigned int num;
u32 iod_int;
};
struct vc7_out_data {
struct clk_hw hw;
struct vc7_driver_data *vc7;
unsigned int num;
unsigned int out_dis;
};
struct vc7_driver_data {
struct i2c_client *client;
struct regmap *regmap;
const struct vc7_chip_info *chip_info;
struct clk *pin_xin;
struct vc7_apll_data clk_apll;
struct vc7_fod_data clk_fod[VC7_NUM_FOD];
struct vc7_iod_data clk_iod[VC7_NUM_IOD];
struct vc7_out_data clk_out[VC7_NUM_OUT];
};
struct vc7_bank_src_map {
enum vc7_bank_src_type {
VC7_FOD,
VC7_IOD,
} type;
union _divider {
struct vc7_iod_data *iod;
struct vc7_fod_data *fod;
} src;
};
static struct clk_hw *vc7_of_clk_get(struct of_phandle_args *clkspec,
void *data)
{
struct vc7_driver_data *vc7 = data;
unsigned int idx = clkspec->args[0];
if (idx >= vc7->chip_info->num_outputs)
return ERR_PTR(-EINVAL);
return &vc7->clk_out[idx].hw;
}
static const unsigned int RC21008A_index_to_output_mapping[] = {
1, 2, 3, 6, 7, 8, 10, 11
};
static int vc7_map_index_to_output(const enum vc7_model model, const unsigned int i)
{
switch (model) {
case VC7_RC21008A:
return RC21008A_index_to_output_mapping[i];
default:
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/clk-provider.h`, `linux/i2c.h`, `linux/math64.h`, `linux/module.h`, `linux/of.h`, `linux/property.h`.
- Detected declarations: `struct vc7_driver_data`, `struct vc7_chip_info`, `struct vc7_apll_data`, `struct vc7_fod_data`, `struct vc7_iod_data`, `struct vc7_out_data`, `struct vc7_driver_data`, `struct vc7_bank_src_map`, `enum vc7_model`, `enum vc7_bank_src_type`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.