drivers/clk/eswin/common.h

Source file repositories/reference/linux-study-clean/drivers/clk/eswin/common.h

File Facts

System
Linux kernel
Corpus path
drivers/clk/eswin/common.h
Extension
.h
Size
8234 bytes
Lines
341
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct eswin_clock_data {
	void __iomem *base;
	struct clk_hw *original_clk;
	struct notifier_block pll_nb;
	spinlock_t lock; /* protect register read-modify-write cycle */
	struct clk_hw_onecell_data clk_data;
};

struct eswin_divider_clock {
	struct clk_hw hw;
	unsigned int id;
	const char *name;
	const struct clk_parent_data *parent_data;
	void __iomem *ctrl_reg; /* register address of the divider clock */
	unsigned long flags;
	unsigned long reg; /* register offset */
	u8 shift;
	u8 width;
	unsigned long div_flags;
	unsigned long priv_flag;
	spinlock_t *lock; /* protect register read-modify-write cycle */
};

struct eswin_fixed_rate_clock {
	struct clk_hw hw;
	unsigned int id;
	const char *name;
	unsigned long flags;
	unsigned long rate;
};

struct eswin_fixed_factor_clock {
	struct clk_hw hw;
	unsigned int id;
	const char *name;
	const struct clk_parent_data *parent_data;
	unsigned long mult;
	unsigned long div;
	unsigned long flags;
};

struct eswin_gate_clock {
	struct clk_hw hw;
	unsigned int id;
	const char *name;
	const struct clk_parent_data *parent_data;
	unsigned long flags;
	unsigned long reg;
	u8 bit_idx;
	u8 gate_flags;
};

struct eswin_mux_clock {
	struct clk_hw hw;
	unsigned int id;
	const char *name;
	const struct clk_parent_data *parent_data;
	u8 num_parents;
	unsigned long flags;
	unsigned long reg;
	u8 shift;
	u8 width;
	u8 mux_flags;
	u32 *table;
};

struct eswin_pll_clock {
	struct clk_hw hw;
	u32 id;
	const char *name;
	const struct clk_parent_data *parent_data;
	const u32 ctrl_reg0;
	const u8 fbdiv_shift;

	const u32 ctrl_reg1;
	const u8 frac_shift;

	const u32 ctrl_reg2;

	const u32 status_reg;
	const u8 lock_shift;
	const u8 lock_width;

	const u64 max_rate;
	const u64 min_rate;
};

struct eswin_clk_pll {
	struct clk_hw hw;
	u32 id;

Annotation

Implementation Notes