drivers/clk/mediatek/clk-fhctl.h
Source file repositories/reference/linux-study-clean/drivers/clk/mediatek/clk-fhctl.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/mediatek/clk-fhctl.h- Extension
.h- Size
- 656 bytes
- Lines
- 34
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
clk-pllfh.h
Detected Declarations
struct fhctl_offsetenum fhctl_variant
Annotated Snippet
struct fhctl_offset {
u32 offset_hp_en;
u32 offset_clk_con;
u32 offset_rst_con;
u32 offset_slope0;
u32 offset_slope1;
u32 offset_cfg;
u32 offset_updnlmt;
u32 offset_dds;
u32 offset_dvfs;
u32 offset_mon;
};
const struct fhctl_offset *fhctl_get_offset_table(enum fhctl_variant v);
const struct fh_operation *fhctl_get_ops(void);
void fhctl_hw_init(struct mtk_fh *fh);
#endif
Annotation
- Immediate include surface: `clk-pllfh.h`.
- Detected declarations: `struct fhctl_offset`, `enum fhctl_variant`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.