drivers/clk/mstar/clk-msc313-mpll.c
Source file repositories/reference/linux-study-clean/drivers/clk/mstar/clk-msc313-mpll.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/clk/mstar/clk-msc313-mpll.c- Extension
.c- Size
- 4467 bytes
- Lines
- 156
- Domain
- Driver Families
- Bucket
- drivers/clk
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/platform_device.hlinux/of_address.hlinux/clk-provider.hlinux/regmap.h
Detected Declarations
struct msc313_mpllfunction msc313_mpll_recalc_ratefunction msc313_mpll_probe
Annotated Snippet
struct msc313_mpll {
struct clk_hw clk_hw;
struct regmap_field *input_div;
struct regmap_field *loop_div_first;
struct regmap_field *loop_div_second;
struct regmap_field *output_div;
struct clk_hw_onecell_data *clk_data;
};
#define to_mpll(_hw) container_of(_hw, struct msc313_mpll, clk_hw)
static unsigned long msc313_mpll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct msc313_mpll *mpll = to_mpll(hw);
unsigned int input_div, output_div, loop_first, loop_second;
unsigned long output_rate;
regmap_field_read(mpll->input_div, &input_div);
regmap_field_read(mpll->output_div, &output_div);
regmap_field_read(mpll->loop_div_first, &loop_first);
regmap_field_read(mpll->loop_div_second, &loop_second);
output_rate = parent_rate / (1 << input_div);
output_rate *= (1 << loop_first) * max(loop_second, 1U);
output_rate /= max(output_div, 1U);
return output_rate;
}
static const struct clk_ops msc313_mpll_ops = {
.recalc_rate = msc313_mpll_recalc_rate,
};
static const struct clk_parent_data mpll_parent = {
.index = 0,
};
static int msc313_mpll_probe(struct platform_device *pdev)
{
void __iomem *base;
struct msc313_mpll *mpll;
struct clk_init_data clk_init = { };
struct device *dev = &pdev->dev;
struct regmap *regmap;
char *outputname;
struct clk_hw *divhw;
int ret, i;
mpll = devm_kzalloc(dev, sizeof(*mpll), GFP_KERNEL);
if (!mpll)
return -ENOMEM;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
regmap = devm_regmap_init_mmio(dev, base, &msc313_mpll_regmap_config);
if (IS_ERR(regmap))
return PTR_ERR(regmap);
mpll->input_div = devm_regmap_field_alloc(dev, regmap, config1_input_div_first);
if (IS_ERR(mpll->input_div))
return PTR_ERR(mpll->input_div);
mpll->output_div = devm_regmap_field_alloc(dev, regmap, config2_output_div_first);
if (IS_ERR(mpll->output_div))
return PTR_ERR(mpll->output_div);
mpll->loop_div_first = devm_regmap_field_alloc(dev, regmap, config1_loop_div_first);
if (IS_ERR(mpll->loop_div_first))
return PTR_ERR(mpll->loop_div_first);
mpll->loop_div_second = devm_regmap_field_alloc(dev, regmap, config2_loop_div_second);
if (IS_ERR(mpll->loop_div_second))
return PTR_ERR(mpll->loop_div_second);
mpll->clk_data = devm_kzalloc(dev, struct_size(mpll->clk_data, hws,
ARRAY_SIZE(output_dividers)), GFP_KERNEL);
if (!mpll->clk_data)
return -ENOMEM;
clk_init.name = dev_name(dev);
clk_init.ops = &msc313_mpll_ops;
clk_init.parent_data = &mpll_parent;
clk_init.num_parents = 1;
mpll->clk_hw.init = &clk_init;
ret = devm_clk_hw_register(dev, &mpll->clk_hw);
if (ret)
return ret;
mpll->clk_data->num = NUMOUTPUTS;
Annotation
- Immediate include surface: `linux/platform_device.h`, `linux/of_address.h`, `linux/clk-provider.h`, `linux/regmap.h`.
- Detected declarations: `struct msc313_mpll`, `function msc313_mpll_recalc_rate`, `function msc313_mpll_probe`.
- Atlas domain: Driver Families / drivers/clk.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.