drivers/clk/mxs/clk-ref.c

Source file repositories/reference/linux-study-clean/drivers/clk/mxs/clk-ref.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/mxs/clk-ref.c
Extension
.c
Size
3037 bytes
Lines
140
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct clk_ref {
	struct clk_hw hw;
	void __iomem *reg;
	u8 idx;
};

#define to_clk_ref(_hw) container_of(_hw, struct clk_ref, hw)

static int clk_ref_enable(struct clk_hw *hw)
{
	struct clk_ref *ref = to_clk_ref(hw);

	writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR);

	return 0;
}

static void clk_ref_disable(struct clk_hw *hw)
{
	struct clk_ref *ref = to_clk_ref(hw);

	writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + SET);
}

static unsigned long clk_ref_recalc_rate(struct clk_hw *hw,
					 unsigned long parent_rate)
{
	struct clk_ref *ref = to_clk_ref(hw);
	u64 tmp = parent_rate;
	u8 frac = (readl_relaxed(ref->reg) >> (ref->idx * 8)) & 0x3f;

	tmp *= 18;
	do_div(tmp, frac);

	return tmp;
}

static int clk_ref_determine_rate(struct clk_hw *hw,
				  struct clk_rate_request *req)
{
	unsigned long parent_rate = req->best_parent_rate;
	u64 tmp = parent_rate;
	u8 frac;

	tmp = tmp * 18 + req->rate / 2;
	do_div(tmp, req->rate);
	frac = clamp(tmp, 18, 35);

	tmp = parent_rate;
	tmp *= 18;
	do_div(tmp, frac);

	req->rate = tmp;

	return 0;
}

static int clk_ref_set_rate(struct clk_hw *hw, unsigned long rate,
			    unsigned long parent_rate)
{
	struct clk_ref *ref = to_clk_ref(hw);
	unsigned long flags;
	u64 tmp = parent_rate;
	u32 val;
	u8 frac, shift = ref->idx * 8;

	tmp = tmp * 18 + rate / 2;
	do_div(tmp, rate);
	frac = clamp(tmp, 18, 35);

	spin_lock_irqsave(&mxs_lock, flags);

	val = readl_relaxed(ref->reg);
	val &= ~(0x3f << shift);
	val |= frac << shift;
	writel_relaxed(val, ref->reg);

	spin_unlock_irqrestore(&mxs_lock, flags);

	return 0;
}

static const struct clk_ops clk_ref_ops = {
	.enable		= clk_ref_enable,
	.disable	= clk_ref_disable,
	.recalc_rate	= clk_ref_recalc_rate,
	.determine_rate = clk_ref_determine_rate,
	.set_rate	= clk_ref_set_rate,
};

Annotation

Implementation Notes