drivers/clk/qcom/lpass-gfm-sm8250.c

Source file repositories/reference/linux-study-clean/drivers/clk/qcom/lpass-gfm-sm8250.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/qcom/lpass-gfm-sm8250.c
Extension
.c
Size
7280 bytes
Lines
319
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct lpass_gfm {
	struct device *dev;
	void __iomem *base;
};

struct clk_gfm {
	unsigned int mux_reg;
	unsigned int mux_mask;
	struct clk_hw	hw;
	struct lpass_gfm *priv;
	void __iomem *gfm_mux;
};

#define to_clk_gfm(_hw) container_of(_hw, struct clk_gfm, hw)

static u8 clk_gfm_get_parent(struct clk_hw *hw)
{
	struct clk_gfm *clk = to_clk_gfm(hw);

	return readl(clk->gfm_mux) & clk->mux_mask;
}

static int clk_gfm_set_parent(struct clk_hw *hw, u8 index)
{
	struct clk_gfm *clk = to_clk_gfm(hw);
	unsigned int val;

	val = readl(clk->gfm_mux);

	if (index)
		val |= clk->mux_mask;
	else
		val &= ~clk->mux_mask;


	writel(val, clk->gfm_mux);

	return 0;
}

static const struct clk_ops clk_gfm_ops = {
	.get_parent = clk_gfm_get_parent,
	.set_parent = clk_gfm_set_parent,
	.determine_rate = __clk_mux_determine_rate,
};

static struct clk_gfm lpass_gfm_va_mclk = {
	.mux_reg = 0x20000,
	.mux_mask = BIT(0),
	.hw.init = &(struct clk_init_data) {
		.name = "VA_MCLK",
		.ops = &clk_gfm_ops,
		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
		.num_parents = 2,
		.parent_data = (const struct clk_parent_data[]){
			{
				.index = 0,
				.fw_name = "LPASS_CLK_ID_TX_CORE_MCLK",
			}, {
				.index = 1,
				.fw_name = "LPASS_CLK_ID_VA_CORE_MCLK",
			},
		},
	},
};

static struct clk_gfm lpass_gfm_tx_npl = {
	.mux_reg = 0x20000,
	.mux_mask = BIT(0),
	.hw.init = &(struct clk_init_data) {
		.name = "TX_NPL",
		.ops = &clk_gfm_ops,
		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
		.parent_data = (const struct clk_parent_data[]){
			{
				.index = 0,
				.fw_name = "LPASS_CLK_ID_TX_CORE_NPL_MCLK",
			}, {
				.index = 1,
				.fw_name = "LPASS_CLK_ID_VA_CORE_2X_MCLK",
			},
		},
		.num_parents = 2,
	},
};

static struct clk_gfm lpass_gfm_wsa_mclk = {
	.mux_reg = 0x220d8,
	.mux_mask = BIT(0),
	.hw.init = &(struct clk_init_data) {

Annotation

Implementation Notes