drivers/clk/qcom/q6sstop-qcs404.c

Source file repositories/reference/linux-study-clean/drivers/clk/qcom/q6sstop-qcs404.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/qcom/q6sstop-qcs404.c
Extension
.c
Size
5129 bytes
Lines
222
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 */

#include <linux/bitops.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_clock.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,q6sstopcc-qcs404.h>

#include "clk-regmap.h"
#include "clk-branch.h"
#include "common.h"
#include "reset.h"

static struct clk_branch lcc_ahbfabric_cbc_clk = {
	.halt_reg = 0x1b004,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x1b004,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "lcc_ahbfabric_cbc_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch lcc_q6ss_ahbs_cbc_clk = {
	.halt_reg = 0x22000,
	.halt_check = BRANCH_VOTED,
	.clkr = {
		.enable_reg = 0x22000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "lcc_q6ss_ahbs_cbc_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch lcc_q6ss_tcm_slave_cbc_clk = {
	.halt_reg = 0x1c000,
	.halt_check = BRANCH_VOTED,
	.clkr = {
		.enable_reg = 0x1c000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "lcc_q6ss_tcm_slave_cbc_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch lcc_q6ss_ahbm_cbc_clk = {
	.halt_reg = 0x22004,
	.halt_check = BRANCH_VOTED,
	.clkr = {
		.enable_reg = 0x22004,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "lcc_q6ss_ahbm_cbc_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch lcc_q6ss_axim_cbc_clk = {
	.halt_reg = 0x1c004,
	.halt_check = BRANCH_VOTED,
	.clkr = {
		.enable_reg = 0x1c004,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data){
			.name = "lcc_q6ss_axim_cbc_clk",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch lcc_q6ss_bcr_sleep_clk = {
	.halt_reg = 0x6004,
	.halt_check = BRANCH_VOTED,
	.clkr = {

Annotation

Implementation Notes