drivers/clk/qcom/turingcc-qcs404.c

Source file repositories/reference/linux-study-clean/drivers/clk/qcom/turingcc-qcs404.c

File Facts

System
Linux kernel
Corpus path
drivers/clk/qcom/turingcc-qcs404.c
Extension
.c
Size
3798 bytes
Lines
169
Domain
Driver Families
Bucket
drivers/clk
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019, Linaro Ltd.
 */

#include <linux/bitops.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/pm_clock.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,turingcc-qcs404.h>

#include "clk-regmap.h"
#include "clk-branch.h"
#include "common.h"
#include "reset.h"

static struct clk_branch turing_wrapper_aon_cbcr = {
	.halt_reg = 0x5098,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x5098,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data) {
			.name = "turing_wrapper_aon_clk",
			.ops = &clk_branch2_aon_ops,
		},
	},
};

static struct clk_branch turing_q6ss_ahbm_aon_cbcr = {
	.halt_reg = 0x9000,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x9000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data) {
			.name = "turing_q6ss_ahbm_aon_cbcr",
			.ops = &clk_branch2_ops,
		},
	},
};

static struct clk_branch turing_q6ss_q6_axim_clk = {
	.halt_reg = 0xb000,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0xb000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data) {
			.name = "turing_q6ss_q6_axim_clk",
			.ops = &clk_branch2_aon_ops,
		},
	},
};

static struct clk_branch turing_q6ss_ahbs_aon_cbcr = {
	.halt_reg = 0x10000,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x10000,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data) {
			.name = "turing_q6ss_ahbs_aon_clk",
			.ops = &clk_branch2_aon_ops,
		},
	},
};

static struct clk_branch turing_wrapper_qos_ahbs_aon_cbcr = {
	.halt_reg = 0x11014,
	.halt_check = BRANCH_HALT,
	.clkr = {
		.enable_reg = 0x11014,
		.enable_mask = BIT(0),
		.hw.init = &(struct clk_init_data) {
			.name = "turing_wrapper_qos_ahbs_aon_clk",
			.ops = &clk_branch2_aon_ops,
		},
	},
};

static struct clk_regmap *turingcc_clocks[] = {
	[TURING_WRAPPER_AON_CLK] = &turing_wrapper_aon_cbcr.clkr,
	[TURING_Q6SS_AHBM_AON_CLK] = &turing_q6ss_ahbm_aon_cbcr.clkr,

Annotation

Implementation Notes